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author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2008-01-24 18:40:03 +0300 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-01-28 08:32:57 -0600 |
commit | 59a0ea5091d309fa8338954b84cf5307dbd83ec9 (patch) | |
tree | c1e1f43de7cdfa3ddde7d8f445eac008b08c60de /arch | |
parent | d0a2f82da949283027a7da6a8b2a70ada46e7b55 (diff) | |
download | kernel_goldelico_gta04-59a0ea5091d309fa8338954b84cf5307dbd83ec9.zip kernel_goldelico_gta04-59a0ea5091d309fa8338954b84cf5307dbd83ec9.tar.gz kernel_goldelico_gta04-59a0ea5091d309fa8338954b84cf5307dbd83ec9.tar.bz2 |
spi_mpc83xx: use brg-frequency for SPI in QE
In case of QE we can use brg-frequency (which is qeclk/2).
Thus no need to divide sysclk in the spi_mpc83xx.
This patch also adds code to use get_brgfreq() on QE chips.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/sysdev/fsl_soc.c | 46 |
1 files changed, 33 insertions, 13 deletions
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 26f7d83..6f81dd5 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -75,7 +75,7 @@ phys_addr_t get_immrbase(void) EXPORT_SYMBOL(get_immrbase); -#if defined(CONFIG_CPM2) || defined(CONFIG_8xx) +#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) static u32 brgfreq = -1; @@ -100,11 +100,21 @@ u32 get_brgfreq(void) /* Legacy device binding -- will go away when no users are left. */ node = of_find_node_by_type(NULL, "cpm"); + if (!node) + node = of_find_compatible_node(NULL, NULL, "fsl,qe"); + if (!node) + node = of_find_node_by_type(NULL, "qe"); + if (node) { prop = of_get_property(node, "brg-frequency", &size); if (prop && size == 4) brgfreq = *prop; + if (brgfreq == -1 || brgfreq == 0) { + prop = of_get_property(node, "bus-frequency", &size); + if (prop && size == 4) + brgfreq = *prop / 2; + } of_node_put(node); } @@ -1273,22 +1283,32 @@ int __init fsl_spi_init(struct spi_board_info *board_infos, { struct device_node *np; unsigned int i; - const u32 *sysclk; + u32 sysclk = -1; /* SPI controller is either clocked from QE or SoC clock */ - np = of_find_compatible_node(NULL, NULL, "fsl,qe"); - if (!np) - np = of_find_node_by_type(NULL, "qe"); +#ifdef CONFIG_QUICC_ENGINE + sysclk = get_brgfreq(); +#endif + if (sysclk == -1) { + const u32 *freq; + int size; - if (!np) np = of_find_node_by_type(NULL, "soc"); + if (!np) + return -ENODEV; + + freq = of_get_property(np, "clock-frequency", &size); + if (!freq || size != sizeof(*freq) || *freq == 0) { + freq = of_get_property(np, "bus-frequency", &size); + if (!freq || size != sizeof(*freq) || *freq == 0) { + of_node_put(np); + return -ENODEV; + } + } - if (!np) - return -ENODEV; - - sysclk = of_get_property(np, "bus-frequency", NULL); - if (!sysclk) - return -ENODEV; + sysclk = *freq; + of_node_put(np); + } for (np = NULL, i = 1; (np = of_find_compatible_node(np, "spi", "fsl_spi")) != NULL; @@ -1305,7 +1325,7 @@ int __init fsl_spi_init(struct spi_board_info *board_infos, memset(res, 0, sizeof(res)); - pdata.sysclk = *sysclk; + pdata.sysclk = sysclk; prop = of_get_property(np, "reg", NULL); if (!prop) |