diff options
author | Luke Browning <lukebrowning@us.ibm.com> | 2008-05-29 17:46:10 -0300 |
---|---|---|
committer | Jeremy Kerr <jk@ozlabs.org> | 2008-06-16 14:34:59 +1000 |
commit | d84050f48ebba73994b93ccf61cea2364dac8d75 (patch) | |
tree | 28137ea97f0707449e0bf85f334e7fb49a495987 /arch | |
parent | d563923011110a91bdbf1d89055c3e803ec01f0f (diff) | |
download | kernel_goldelico_gta04-d84050f48ebba73994b93ccf61cea2364dac8d75.zip kernel_goldelico_gta04-d84050f48ebba73994b93ccf61cea2364dac8d75.tar.gz kernel_goldelico_gta04-d84050f48ebba73994b93ccf61cea2364dac8d75.tar.bz2 |
powerpc/spufs: wait for stable spu status in spu_stopped()
If the spu is stopping (ie, the SPU_STATUS_RUNNING bit is still set),
re-read the register to get the final stopped value.
Signed-off-by: Luke Browning <lukebrowning@us.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/cell/spufs/run.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c index b7493b8..0046bcf 100644 --- a/arch/powerpc/platforms/cell/spufs/run.c +++ b/arch/powerpc/platforms/cell/spufs/run.c @@ -51,14 +51,22 @@ int spu_stopped(struct spu_context *ctx, u32 *stat) u64 dsisr; u32 stopped; - *stat = ctx->ops->status_read(ctx); + stopped = SPU_STATUS_INVALID_INSTR | SPU_STATUS_SINGLE_STEP | + SPU_STATUS_STOPPED_BY_HALT | SPU_STATUS_STOPPED_BY_STOP; - if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags)) +top: + *stat = ctx->ops->status_read(ctx); + if (*stat & stopped) { + /* + * If the spu hasn't finished stopping, we need to + * re-read the register to get the stopped value. + */ + if (*stat & SPU_STATUS_RUNNING) + goto top; return 1; + } - stopped = SPU_STATUS_INVALID_INSTR | SPU_STATUS_SINGLE_STEP | - SPU_STATUS_STOPPED_BY_HALT | SPU_STATUS_STOPPED_BY_STOP; - if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped)) + if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags)) return 1; dsisr = ctx->csa.class_0_dsisr; |