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| author | Dan Williams <dan.j.williams@intel.com> | 2008-03-18 21:23:59 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2008-03-18 17:01:00 -0700 |
| commit | 8d8002f642886ae256a3c5d70fe8aff4faf3631a (patch) | |
| tree | 81a3df533e7a0ad2d268b28fba1507e770df0f55 /crypto/async_tx/async_xor.c | |
| parent | f79abb627f033c85a6088231f20c85bc4a9bd757 (diff) | |
| download | kernel_goldelico_gta04-8d8002f642886ae256a3c5d70fe8aff4faf3631a.zip kernel_goldelico_gta04-8d8002f642886ae256a3c5d70fe8aff4faf3631a.tar.gz kernel_goldelico_gta04-8d8002f642886ae256a3c5d70fe8aff4faf3631a.tar.bz2 | |
async_tx: avoid the async xor_zero_sum path when src_cnt > device->max_xor
If the channel cannot perform the operation in one call to
->device_prep_dma_zero_sum, then fallback to the xor+page_is_zero path.
This only affects users with arrays larger than 16 devices on iop13xx or
32 devices on iop3xx.
Cc: <stable@kernel.org>
Cc: Neil Brown <neilb@suse.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'crypto/async_tx/async_xor.c')
| -rw-r--r-- | crypto/async_tx/async_xor.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/crypto/async_tx/async_xor.c b/crypto/async_tx/async_xor.c index 7a9db35..1c445c7 100644 --- a/crypto/async_tx/async_xor.c +++ b/crypto/async_tx/async_xor.c @@ -271,7 +271,7 @@ async_xor_zero_sum(struct page *dest, struct page **src_list, BUG_ON(src_cnt <= 1); - if (device) { + if (device && src_cnt <= device->max_xor) { dma_addr_t *dma_src = (dma_addr_t *) src_list; unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; int i; |