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| author | Jiri Slaby <jirislaby@gmail.com> | 2006-12-08 02:38:14 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-08 08:28:53 -0800 |
| commit | 55b307da3e00b2281788860eefb42976a86d7752 (patch) | |
| tree | 8d942f774c9bce13e90a5c97d3845568f4ac7961 /drivers/char/mxser_new.h | |
| parent | 3306ce3d0554e2e59cc429b7133e17e1513307cb (diff) | |
| download | kernel_goldelico_gta04-55b307da3e00b2281788860eefb42976a86d7752.zip kernel_goldelico_gta04-55b307da3e00b2281788860eefb42976a86d7752.tar.gz kernel_goldelico_gta04-55b307da3e00b2281788860eefb42976a86d7752.tar.bz2 | |
[PATCH] Char: mxser_new, rework to allow dynamic structs
This patch is preparation for further patches (pci probing) to allow allocated
structures to be private data in pci_dev structure. Union two different
structures used in the driver (hw_conf and port/board descriptor) to another
2: port and board not to initialize 2 different things and to have ports
contained in board structure.
Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/char/mxser_new.h')
| -rw-r--r-- | drivers/char/mxser_new.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/char/mxser_new.h b/drivers/char/mxser_new.h index 32ce1a8..a08f0ec 100644 --- a/drivers/char/mxser_new.h +++ b/drivers/char/mxser_new.h @@ -300,16 +300,16 @@ //#define MOXA_MUST_RBRL_VALUE 4 #define SET_MOXA_MUST_FIFO_VALUE(info) { \ u8 __oldlcr, __efr; \ - __oldlcr = inb((info)->base+UART_LCR); \ - outb(MOXA_MUST_ENTER_ENCHANCE, (info)->base+UART_LCR); \ - __efr = inb((info)->base+MOXA_MUST_EFR_REGISTER); \ + __oldlcr = inb((info)->ioaddr+UART_LCR); \ + outb(MOXA_MUST_ENTER_ENCHANCE, (info)->ioaddr+UART_LCR); \ + __efr = inb((info)->ioaddr+MOXA_MUST_EFR_REGISTER); \ __efr &= ~MOXA_MUST_EFR_BANK_MASK; \ __efr |= MOXA_MUST_EFR_BANK1; \ - outb(__efr, (info)->base+MOXA_MUST_EFR_REGISTER); \ - outb((u8)((info)->rx_high_water), (info)->base+MOXA_MUST_RBRTH_REGISTER); \ - outb((u8)((info)->rx_trigger), (info)->base+MOXA_MUST_RBRTI_REGISTER); \ - outb((u8)((info)->rx_low_water), (info)->base+MOXA_MUST_RBRTL_REGISTER); \ - outb(__oldlcr, (info)->base+UART_LCR); \ + outb(__efr, (info)->ioaddr+MOXA_MUST_EFR_REGISTER); \ + outb((u8)((info)->rx_high_water), (info)->ioaddr+MOXA_MUST_RBRTH_REGISTER); \ + outb((u8)((info)->rx_trigger), (info)->ioaddr+MOXA_MUST_RBRTI_REGISTER); \ + outb((u8)((info)->rx_low_water), (info)->ioaddr+MOXA_MUST_RBRTL_REGISTER); \ + outb(__oldlcr, (info)->ioaddr+UART_LCR); \ } |