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authorTang Yuantian <yuantian.tang@freescale.com>2013-05-22 16:22:19 +0800
committerMike Turquette <mturquette@linaro.org>2013-05-30 11:55:35 -0700
commit4bcccf193dae6afd0ac78bb89c6e4b0b8324e9d4 (patch)
treee8a476a481669a0d502bc2e429311fd6f62a5987 /drivers/clk
parent61fd58dc578d40c1cfe2691380c42860c6fff809 (diff)
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clk: mpc85xx: Update the compatible string
The compatible string of clock is changed from *-2 to *-2.0 on chassis 2. So updated it accordingly. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: improved $SUBJECT line]
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/clk-ppc-corenet.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index a2d483f..e958707 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -260,7 +260,7 @@ static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
static const struct of_device_id ppc_clk_ids[] __initconst = {
{ .compatible = "fsl,qoriq-clockgen-1.0", },
- { .compatible = "fsl,qoriq-clockgen-2", },
+ { .compatible = "fsl,qoriq-clockgen-2.0", },
{}
};