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| author | Borislav Petkov <borislav.petkov@amd.com> | 2012-09-14 20:10:59 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@alien8.de> | 2012-11-28 11:56:17 +0100 |
| commit | d824c7718b78b6a5afae7fc78731b70318cd076f (patch) | |
| tree | 68eb55daac55a038394529eca750936aa9606ecd /drivers/edac/mce_amd.c | |
| parent | f89f8388cd11faa8e77992cb11ab44ac9a6abf4f (diff) | |
| download | kernel_goldelico_gta04-d824c7718b78b6a5afae7fc78731b70318cd076f.zip kernel_goldelico_gta04-d824c7718b78b6a5afae7fc78731b70318cd076f.tar.gz kernel_goldelico_gta04-d824c7718b78b6a5afae7fc78731b70318cd076f.tar.bz2 | |
MCE, AMD: Report decoded error type first
Instead of starting with the error details, report the decoded, readable
error type first.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/mce_amd.c')
| -rw-r--r-- | drivers/edac/mce_amd.c | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index e871a2a..f856a25 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -676,31 +676,6 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) if (amd_filter_mce(m)) return NOTIFY_STOP; - pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s", - m->extcpu, - c->x86, c->x86_model, c->x86_mask, - m->bank, - ((m->status & MCI_STATUS_OVER) ? "Over" : "-"), - ((m->status & MCI_STATUS_UC) ? "UE" : "CE"), - ((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"), - ((m->status & MCI_STATUS_PCC) ? "PCC" : "-"), - ((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-")); - - if (c->x86 == 0x15) - pr_cont("|%s|%s", - ((m->status & BIT_64(44)) ? "Deferred" : "-"), - ((m->status & BIT_64(43)) ? "Poison" : "-")); - - /* do the two bits[14:13] together */ - ecc = (m->status >> 45) & 0x3; - if (ecc) - pr_cont("|%sECC", ((ecc == 2) ? "C" : "U")); - - pr_cont("]: 0x%016llx\n", m->status); - - if (m->status & MCI_STATUS_ADDRV) - pr_emerg(HW_ERR "MC%d_ADDR: 0x%016llx\n", m->bank, m->addr); - switch (m->bank) { case 0: decode_mc0_mce(m); @@ -737,6 +712,31 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) break; } + pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s", + m->extcpu, + c->x86, c->x86_model, c->x86_mask, + m->bank, + ((m->status & MCI_STATUS_OVER) ? "Over" : "-"), + ((m->status & MCI_STATUS_UC) ? "UE" : "CE"), + ((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"), + ((m->status & MCI_STATUS_PCC) ? "PCC" : "-"), + ((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-")); + + if (c->x86 == 0x15) + pr_cont("|%s|%s", + ((m->status & BIT_64(44)) ? "Deferred" : "-"), + ((m->status & BIT_64(43)) ? "Poison" : "-")); + + /* do the two bits[14:13] together */ + ecc = (m->status >> 45) & 0x3; + if (ecc) + pr_cont("|%sECC", ((ecc == 2) ? "C" : "U")); + + pr_cont("]: 0x%016llx\n", m->status); + + if (m->status & MCI_STATUS_ADDRV) + pr_emerg(HW_ERR "MC%d_ADDR: 0x%016llx\n", m->bank, m->addr); + amd_decode_err_code(m->status & 0xffff); return NOTIFY_STOP; |