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| author | Daniel J Blueman <daniel@numascale-asia.com> | 2012-11-27 14:32:09 +0800 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2013-01-10 16:17:58 +0100 |
| commit | 772c3ff385eda0d0b4744596f87b79a17f8c9282 (patch) | |
| tree | beafb4dbaafa13dc01a35acb5d8b4949bb568d0e /drivers/edac | |
| parent | 9931faca02c604c22335f5a935a501bb2ace6e20 (diff) | |
| download | kernel_goldelico_gta04-772c3ff385eda0d0b4744596f87b79a17f8c9282.zip kernel_goldelico_gta04-772c3ff385eda0d0b4744596f87b79a17f8c9282.tar.gz kernel_goldelico_gta04-772c3ff385eda0d0b4744596f87b79a17f8c9282.tar.bz2 | |
x86, AMD, NB: Add multi-domain support
Fix get_node_id to match northbridge IDs from the array of detected
ones, allowing multi-server support such as with Numascale's
NumaConnect, renaming to 'amd_get_node_id' for consistency.
Signed-off-by: Daniel J Blueman <daniel@numascale-asia.com>
Link: http://lkml.kernel.org/r/1353997932-8475-1-git-send-email-daniel@numascale-asia.com
[Boris: shorten lines to fit 80 cols]
Signed-off-by: Borislav Petkov <bp@alien8.de>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/amd64_edac.c | 6 | ||||
| -rw-r--r-- | drivers/edac/amd64_edac.h | 6 |
2 files changed, 3 insertions, 9 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index ad8bf2a..a3fe39b 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2474,7 +2474,7 @@ static int amd64_init_one_instance(struct pci_dev *F2) struct mem_ctl_info *mci = NULL; struct edac_mc_layer layers[2]; int err = 0, ret; - u8 nid = get_node_id(F2); + u16 nid = amd_get_node_id(F2); ret = -ENOMEM; pvt = kzalloc(sizeof(struct amd64_pvt), GFP_KERNEL); @@ -2566,7 +2566,7 @@ err_ret: static int amd64_probe_one_instance(struct pci_dev *pdev, const struct pci_device_id *mc_type) { - u8 nid = get_node_id(pdev); + u16 nid = amd_get_node_id(pdev); struct pci_dev *F3 = node_to_amd_nb(nid)->misc; struct ecc_settings *s; int ret = 0; @@ -2616,7 +2616,7 @@ static void amd64_remove_one_instance(struct pci_dev *pdev) { struct mem_ctl_info *mci; struct amd64_pvt *pvt; - u8 nid = get_node_id(pdev); + u16 nid = amd_get_node_id(pdev); struct pci_dev *F3 = node_to_amd_nb(nid)->misc; struct ecc_settings *s = ecc_stngs[nid]; diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index e864f40..cd7845f 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -292,12 +292,6 @@ /* MSRs */ #define MSR_MCGCTL_NBE BIT(4) -/* AMD sets the first MC device at device ID 0x18. */ -static inline u8 get_node_id(struct pci_dev *pdev) -{ - return PCI_SLOT(pdev->devfn) - 0x18; -} - enum amd_families { K8_CPUS = 0, F10_CPUS, |