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| author | Niklas Söderlund <niklas.soderlund@ericsson.com> | 2012-02-17 07:36:54 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-03-21 15:20:55 -0300 |
| commit | b6378cb3e545912a19e6355aa9171326fdc004d8 (patch) | |
| tree | 6cef8bfe104b471ae403fd9d24b30c6054f4e556 /drivers/edac | |
| parent | 7fae0db43906ef182b3aee22415c9042ab18d6e6 (diff) | |
| download | kernel_goldelico_gta04-b6378cb3e545912a19e6355aa9171326fdc004d8.zip kernel_goldelico_gta04-b6378cb3e545912a19e6355aa9171326fdc004d8.tar.gz kernel_goldelico_gta04-b6378cb3e545912a19e6355aa9171326fdc004d8.tar.bz2 | |
edac: i5100 fix erroneous define for M1Err
According to [1] the define for M1Err in the FERR_NF_MEM register is
wrong. It should be at position 1 not 0.
[1] Intel 5100 Memory Controller Hub Chipset Doc.Nr: 318378
http://www.intel.com/content/dam/doc/datasheet/5100-
memory-controller-hub-chipset-datasheet.pdf
Reported-by: Ba Thang Nguyen <thang.b.nguyen@dektech.com.au>
Signed-off-by: Niklas Söderlund <niklas.soderlund@ericsson.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/i5100_edac.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index bcbdeec..ab2f906 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -49,7 +49,7 @@ #define I5100_FERR_NF_MEM_M6ERR_MASK (1 << 6) #define I5100_FERR_NF_MEM_M5ERR_MASK (1 << 5) #define I5100_FERR_NF_MEM_M4ERR_MASK (1 << 4) -#define I5100_FERR_NF_MEM_M1ERR_MASK 1 +#define I5100_FERR_NF_MEM_M1ERR_MASK (1 << 1) #define I5100_FERR_NF_MEM_ANY_MASK \ (I5100_FERR_NF_MEM_M16ERR_MASK | \ I5100_FERR_NF_MEM_M15ERR_MASK | \ |