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author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-08 23:35:37 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-09 21:53:17 +0200 |
commit | 73edd18f610b6dd900cc3a180919dc643fff8513 (patch) | |
tree | 10a358217a0a6d0b95ef3c474b33edfc2e0f47f3 /drivers/gpu/drm/i915/i915_irq.c | |
parent | 35eb73234be6e7fa515c5f1b233ba33d030938cf (diff) | |
download | kernel_goldelico_gta04-73edd18f610b6dd900cc3a180919dc643fff8513.zip kernel_goldelico_gta04-73edd18f610b6dd900cc3a180919dc643fff8513.tar.gz kernel_goldelico_gta04-73edd18f610b6dd900cc3a180919dc643fff8513.tar.bz2 |
drm/i915: DE_PCU_EVENT irq is ilk-only
Like all the other drps/ips stuff. Hence add the corresponding check,
give the function a preciser prefix and move the single reg clearing into
the rps handling function, too.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 74c9a0e..3e203da 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -296,12 +296,14 @@ static void i915_hotplug_work_func(struct work_struct *work) drm_helper_hpd_irq_event(dev); } -static void i915_handle_rps_change(struct drm_device *dev) +static void ironlake_handle_rps_change(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; u32 busy_up, busy_down, max_avg, min_avg; u8 new_delay = dev_priv->cur_delay; + I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS)); + I915_WRITE16(MEMINTRSTS, MEMINT_EVAL_CHG); busy_up = I915_READ(RCPREVBSYTUPAVG); busy_down = I915_READ(RCPREVBSYTDNAVG); @@ -794,10 +796,8 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) ibx_irq_handler(dev, pch_iir); } - if (de_iir & DE_PCU_EVENT) { - I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS)); - i915_handle_rps_change(dev); - } + if (IS_GEN5(dev) && de_iir & DE_PCU_EVENT) + ironlake_handle_rps_change(dev); if (IS_GEN6(dev) && pm_iir & GEN6_PM_DEFERRED_EVENTS) gen6_queue_rps_work(dev_priv, pm_iir); |