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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-10-07 16:01:18 -0700 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-08 10:28:23 +0100 |
| commit | 83240120878805b537a2efeaabff92798140b7cf (patch) | |
| tree | 8c2a2a4f89a015843fdb27e6b7f02bfda0d522e9 /drivers/gpu | |
| parent | 1cb1b75e5e0120cc35c4a9420ce366b84e0cf951 (diff) | |
| download | kernel_goldelico_gta04-83240120878805b537a2efeaabff92798140b7cf.zip kernel_goldelico_gta04-83240120878805b537a2efeaabff92798140b7cf.tar.gz kernel_goldelico_gta04-83240120878805b537a2efeaabff92798140b7cf.tar.bz2 | |
drm/i915: use DPLL_DVO_HIGH_SPEED for PCH eDP
As with other PCH DP connections.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5f00632..acd7180 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3850,7 +3850,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, } dpll |= DPLL_DVO_HIGH_SPEED; } - if (is_dp) + if (is_dp || intel_encoder_is_pch_edp(&has_edp_encoder->base)) dpll |= DPLL_DVO_HIGH_SPEED; /* compute bitmask from p1 value */ |