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| author | Len Brown <len.brown@intel.com> | 2010-07-07 00:12:03 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2010-10-23 02:32:08 -0400 |
| commit | d13780d439d08a57c87c1a07b6e76ddde61da1aa (patch) | |
| tree | b172c1f43a206a22539d60782c3f28b1265e5c18 /drivers/idle/intel_idle.c | |
| parent | 815c4163b6c8ebf8152f42b0a5fd015cfdcedc78 (diff) | |
| download | kernel_goldelico_gta04-d13780d439d08a57c87c1a07b6e76ddde61da1aa.zip kernel_goldelico_gta04-d13780d439d08a57c87c1a07b6e76ddde61da1aa.tar.gz kernel_goldelico_gta04-d13780d439d08a57c87c1a07b6e76ddde61da1aa.tar.bz2 | |
intel_idle: add initial Sandy Bridge support
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/idle/intel_idle.c')
| -rwxr-xr-x | drivers/idle/intel_idle.c | 44 |
1 files changed, 43 insertions, 1 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 54f0fb4..84476be 100755 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -83,7 +83,7 @@ static unsigned int substates; static int (*choose_substate)(int); /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ -static unsigned int lapic_timer_reliable_states; +static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */ static struct cpuidle_device *intel_idle_cpuidle_devices; static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state); @@ -126,6 +126,42 @@ static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { .enter = &intel_idle }, }; +static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { + { /* MWAIT C0 */ }, + { /* MWAIT C1 */ + .name = "SNB-C1", + .desc = "MWAIT 0x00", + .driver_data = (void *) 0x00, + .flags = CPUIDLE_FLAG_TIME_VALID, + .exit_latency = 1, + .target_residency = 4, + .enter = &intel_idle }, + { /* MWAIT C2 */ + .name = "SNB-C3", + .desc = "MWAIT 0x10", + .driver_data = (void *) 0x10, + .flags = CPUIDLE_FLAG_TIME_VALID, + .exit_latency = 80, + .target_residency = 160, + .enter = &intel_idle }, + { /* MWAIT C3 */ + .name = "SNB-C6", + .desc = "MWAIT 0x20", + .driver_data = (void *) 0x20, + .flags = CPUIDLE_FLAG_TIME_VALID, + .exit_latency = 104, + .target_residency = 208, + .enter = &intel_idle }, + { /* MWAIT C4 */ + .name = "SNB-C7", + .desc = "MWAIT 0x30", + .driver_data = (void *) 0x30, + .flags = CPUIDLE_FLAG_TIME_VALID, + .exit_latency = 109, + .target_residency = 300, + .enter = &intel_idle }, +}; + static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { { /* MWAIT C0 */ }, { /* MWAIT C1 */ @@ -312,6 +348,12 @@ static int intel_idle_probe(void) cpuidle_state_table = atom_cstates; choose_substate = choose_zero_substate; break; + + case 0x2A: /* SNB */ + case 0x2D: /* SNB Xeon */ + cpuidle_state_table = snb_cstates; + choose_substate = choose_zero_substate; + break; #ifdef FUTURE_USE case 0x17: /* 23 - Core 2 Duo */ lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */ |