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| author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2013-06-13 11:23:38 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-06-18 16:15:18 +0900 |
| commit | 894db164260c39870ea79e473e1307b4aa5e4257 (patch) | |
| tree | 108e8b9252f79fcdf4e1a58507300f255cedce5f /drivers/irqchip/irq-renesas-intc-irqpin.c | |
| parent | 24603f3caf07f5f65aa17ed7851ad4741595cf6a (diff) | |
| download | kernel_goldelico_gta04-894db164260c39870ea79e473e1307b4aa5e4257.zip kernel_goldelico_gta04-894db164260c39870ea79e473e1307b4aa5e4257.tar.gz kernel_goldelico_gta04-894db164260c39870ea79e473e1307b4aa5e4257.tar.bz2 | |
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Most Renesas irqpin controllers have 4-bit sense fields, however, some
have different widths. This patch adds a DT binding to optionally
specify such non-standard values.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/irqchip/irq-renesas-intc-irqpin.c')
| -rw-r--r-- | drivers/irqchip/irq-renesas-intc-irqpin.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 5a68e5a..4aca1b2 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -18,6 +18,7 @@ */ #include <linux/init.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/interrupt.h> @@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev) /* deal with driver instance configuration */ if (pdata) memcpy(&p->config, pdata, sizeof(*pdata)); + else + of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width", + &p->config.sense_bitfield_width); if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width = 4; /* default to 4 bits */ |