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| author | Abhijeet Joglekar <abjoglek@cisco.com> | 2009-10-21 16:28:14 -0700 |
|---|---|---|
| committer | James Bottomley <James.Bottomley@suse.de> | 2009-12-04 12:00:35 -0600 |
| commit | d5cf4b28e13989ace24cf26de1e1debec18e9685 (patch) | |
| tree | f1b5ad05036ef81a5ab1c16d25d6484dadb73d13 /drivers/scsi/fnic | |
| parent | 8f550f937e9fdafa5c37e348e214aecec851ef3f (diff) | |
| download | kernel_goldelico_gta04-d5cf4b28e13989ace24cf26de1e1debec18e9685.zip kernel_goldelico_gta04-d5cf4b28e13989ace24cf26de1e1debec18e9685.tar.gz kernel_goldelico_gta04-d5cf4b28e13989ace24cf26de1e1debec18e9685.tar.bz2 | |
[SCSI] fnic: Process all cq entries per ISR
Driver was processing a fixed max number of cq descriptors per ISR. For
instance, for the SCSI IO queue, number of IOs processed per ISR were 8.
If hardware writes 9 cq descriptors to the cq and generates an interrupt,
driver would process only 8 descriptors and decrement the outstanding
credit count by 8. Unless another interrupt event happens, the hw does
not generate any additional interrupt. This results in the cq descriptor
sitting in the queue without being procesed and can cause IO timeouts
and aborts.
Modify all ISR functions to process all queued cq descriptors in one shot.
Since bulk of ELS frame processing is done in thread context and bulk
of SCSI IO processing is done in soft ISR deferred context, the cycles
spent in the ISR per cq descriptor is small.
Signed-off-by: Herman Lee <hermlee@cisco.com>
Signed-off-by: Abhijeet Joglekar <abjoglek@cisco.com>
Signed-off-by: Robert Love <robert.w.love@intel.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/fnic')
| -rw-r--r-- | drivers/scsi/fnic/fnic_isr.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/scsi/fnic/fnic_isr.c b/drivers/scsi/fnic/fnic_isr.c index 2b30648..5c1f223 100644 --- a/drivers/scsi/fnic/fnic_isr.c +++ b/drivers/scsi/fnic/fnic_isr.c @@ -48,9 +48,9 @@ static irqreturn_t fnic_isr_legacy(int irq, void *data) } if (pba & (1 << FNIC_INTX_WQ_RQ_COPYWQ)) { - work_done += fnic_wq_copy_cmpl_handler(fnic, 8); - work_done += fnic_wq_cmpl_handler(fnic, 4); - work_done += fnic_rq_cmpl_handler(fnic, 4); + work_done += fnic_wq_copy_cmpl_handler(fnic, -1); + work_done += fnic_wq_cmpl_handler(fnic, -1); + work_done += fnic_rq_cmpl_handler(fnic, -1); vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ], work_done, @@ -66,9 +66,9 @@ static irqreturn_t fnic_isr_msi(int irq, void *data) struct fnic *fnic = data; unsigned long work_done = 0; - work_done += fnic_wq_copy_cmpl_handler(fnic, 8); - work_done += fnic_wq_cmpl_handler(fnic, 4); - work_done += fnic_rq_cmpl_handler(fnic, 4); + work_done += fnic_wq_copy_cmpl_handler(fnic, -1); + work_done += fnic_wq_cmpl_handler(fnic, -1); + work_done += fnic_rq_cmpl_handler(fnic, -1); vnic_intr_return_credits(&fnic->intr[0], work_done, @@ -83,7 +83,7 @@ static irqreturn_t fnic_isr_msix_rq(int irq, void *data) struct fnic *fnic = data; unsigned long rq_work_done = 0; - rq_work_done = fnic_rq_cmpl_handler(fnic, 4); + rq_work_done = fnic_rq_cmpl_handler(fnic, -1); vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_RQ], rq_work_done, 1 /* unmask intr */, @@ -97,7 +97,7 @@ static irqreturn_t fnic_isr_msix_wq(int irq, void *data) struct fnic *fnic = data; unsigned long wq_work_done = 0; - wq_work_done = fnic_wq_cmpl_handler(fnic, 4); + wq_work_done = fnic_wq_cmpl_handler(fnic, -1); vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_WQ], wq_work_done, 1 /* unmask intr */, @@ -110,7 +110,7 @@ static irqreturn_t fnic_isr_msix_wq_copy(int irq, void *data) struct fnic *fnic = data; unsigned long wq_copy_work_done = 0; - wq_copy_work_done = fnic_wq_copy_cmpl_handler(fnic, 8); + wq_copy_work_done = fnic_wq_copy_cmpl_handler(fnic, -1); vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_WQ_COPY], wq_copy_work_done, 1 /* unmask intr */, |