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| author | Heikki Krogerus <heikki.krogerus@linux.intel.com> | 2013-01-10 11:25:10 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-01-15 23:03:00 -0800 |
| commit | 6a7320c4669fbf26a8e71a4c8af4101923152375 (patch) | |
| tree | 789a7888d6be195189179ff1d2dd2bd78e06cd4c /drivers/tty/serial/8250/8250_dw.c | |
| parent | 30046df261875dfeaf92b44fe5cd6cde9716a561 (diff) | |
| download | kernel_goldelico_gta04-6a7320c4669fbf26a8e71a4c8af4101923152375.zip kernel_goldelico_gta04-6a7320c4669fbf26a8e71a4c8af4101923152375.tar.gz kernel_goldelico_gta04-6a7320c4669fbf26a8e71a4c8af4101923152375.tar.bz2 | |
serial: 8250_dw: Add ACPI 5.0 support
This adds support for ACPI 5.0 enumerated Designware UARTs.
ACPI does not deliver information about uart clk, so
delivering it with the driver_data.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/8250/8250_dw.c')
| -rw-r--r-- | drivers/tty/serial/8250/8250_dw.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index e104092..f6eeff0 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -2,6 +2,7 @@ * Synopsys DesignWare 8250 driver. * * Copyright 2011 Picochip, Jamie Iles. + * Copyright 2013 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -24,12 +25,16 @@ #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/slab.h> +#include <linux/acpi.h> /* Offsets for the DesignWare specific registers */ #define DW_UART_USR 0x1f /* UART Status Register */ #define DW_UART_CPR 0xf4 /* Component Parameter Register */ #define DW_UART_UCV 0xf8 /* UART Component Version */ +/* Intel Low Power Subsystem specific */ +#define LPSS_PRV_CLOCK_PARAMS 0x800 + /* Component Parameter Register bits */ #define DW_UART_CPR_ABP_DATA_WIDTH (3 << 0) #define DW_UART_CPR_AFCE_MODE (1 << 4) @@ -138,6 +143,30 @@ static int dw8250_probe_of(struct uart_port *p) return 0; } +static int dw8250_probe_acpi(struct uart_port *p) +{ + const struct acpi_device_id *id; + u32 reg; + + id = acpi_match_device(p->dev->driver->acpi_match_table, p->dev); + if (!id) + return -ENODEV; + + p->iotype = UPIO_MEM32; + p->serial_in = dw8250_serial_in32; + p->serial_out = dw8250_serial_out32; + p->regshift = 2; + p->uartclk = (unsigned int)id->driver_data; + + /* Fix Haswell issue where the clocks do not get enabled */ + if (!strcmp(id->id, "INT33C4") || !strcmp(id->id, "INT33C5")) { + reg = readl(p->membase + LPSS_PRV_CLOCK_PARAMS); + writel(reg | 1, p->membase + LPSS_PRV_CLOCK_PARAMS); + } + + return 0; +} + static void dw8250_setup_port(struct uart_8250_port *up) { struct uart_port *p = &up->port; @@ -199,6 +228,10 @@ static int dw8250_probe(struct platform_device *pdev) err = dw8250_probe_of(&uart.port); if (err) return err; + } else if (ACPI_HANDLE(&pdev->dev)) { + err = dw8250_probe_acpi(&uart.port); + if (err) + return err; } else { return -ENODEV; } @@ -258,11 +291,19 @@ static const struct of_device_id dw8250_of_match[] = { }; MODULE_DEVICE_TABLE(of, dw8250_of_match); +static const struct acpi_device_id dw8250_acpi_match[] = { + { "INT33C4", 100000000 }, + { "INT33C5", 100000000 }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, dw8250_acpi_match); + static struct platform_driver dw8250_platform_driver = { .driver = { .name = "dw-apb-uart", .owner = THIS_MODULE, .of_match_table = dw8250_of_match, + .acpi_match_table = ACPI_PTR(dw8250_acpi_match), }, .probe = dw8250_probe, .remove = dw8250_remove, |