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| author | Sebastian Andrzej Siewior <bigeasy@linutronix.de> | 2012-10-30 19:52:24 +0100 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2012-10-31 15:21:01 +0200 |
| commit | 515ba29cd7b571da45365e4db80c1b6905869ef3 (patch) | |
| tree | 2351e46c28558ac37fc2258925db8da736195286 /drivers/usb/musb | |
| parent | b11e94d03726c5dbee0d9a841a025313504e90f4 (diff) | |
| download | kernel_goldelico_gta04-515ba29cd7b571da45365e4db80c1b6905869ef3.zip kernel_goldelico_gta04-515ba29cd7b571da45365e4db80c1b6905869ef3.tar.gz kernel_goldelico_gta04-515ba29cd7b571da45365e4db80c1b6905869ef3.tar.bz2 | |
usb: musb: avoid FADDR read access
This is part of the workaround for AM35x advisory Advisory 1.1.20.
The advisory says that the IPSS bridge can't handle 8 & 16 bit read
access. An 8bit read access to FADDR results in an 32bit read
access which also reads INTRTX and therefore may lose interrupts.
This patch removes any reads to FADDR as they are not really required.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/musb')
| -rw-r--r-- | drivers/usb/musb/musb_gadget.c | 3 | ||||
| -rw-r--r-- | drivers/usb/musb/musb_gadget_ep0.c | 6 |
2 files changed, 3 insertions, 6 deletions
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c index d0b87e7..b430f15 100644 --- a/drivers/usb/musb/musb_gadget.c +++ b/drivers/usb/musb/musb_gadget.c @@ -2154,10 +2154,9 @@ __acquires(musb->lock) u8 devctl = musb_readb(mbase, MUSB_DEVCTL); u8 power; - dev_dbg(musb->controller, "<== %s addr=%x driver '%s'\n", + dev_dbg(musb->controller, "<== %s driver '%s'\n", (devctl & MUSB_DEVCTL_BDEVICE) ? "B-Device" : "A-Device", - musb_readb(mbase, MUSB_FADDR), musb->gadget_driver ? musb->gadget_driver->driver.name : NULL diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c index e40d764..c9c1ac4 100644 --- a/drivers/usb/musb/musb_gadget_ep0.c +++ b/drivers/usb/musb/musb_gadget_ep0.c @@ -673,10 +673,8 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb) csr = musb_readw(regs, MUSB_CSR0); len = musb_readb(regs, MUSB_COUNT0); - dev_dbg(musb->controller, "csr %04x, count %d, myaddr %d, ep0stage %s\n", - csr, len, - musb_readb(mbase, MUSB_FADDR), - decode_ep0stage(musb->ep0_state)); + dev_dbg(musb->controller, "csr %04x, count %d, ep0stage %s\n", + csr, len, decode_ep0stage(musb->ep0_state)); if (csr & MUSB_CSR0_P_DATAEND) { /* |