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author | Stephen Warren <swarren@nvidia.com> | 2012-08-01 11:40:49 -0600 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-08-04 12:13:53 +0100 |
commit | 685879f4b2036e58c1a0cdaaee2b155d3c965461 (patch) | |
tree | 682b86c2c94bdc14c6ca4a4ddc32d0a29a5e955b /drivers/xen/manage.c | |
parent | ca142750f8ac3d01e45909e624ca783779894640 (diff) | |
download | kernel_goldelico_gta04-685879f4b2036e58c1a0cdaaee2b155d3c965461.zip kernel_goldelico_gta04-685879f4b2036e58c1a0cdaaee2b155d3c965461.tar.gz kernel_goldelico_gta04-685879f4b2036e58c1a0cdaaee2b155d3c965461.tar.bz2 |
regmap: set MASK_ON_SUSPEND/SKIP_SET_WAKE if no wake_base
If a regmap-irq chip has no wake base:
* There's no point calling .irq_set_wake, hence IRQCHIP_SKIP_SET_WAKE.
* If some IRQs in the chip are enabled for wake and some aren't, we
should mask those interrupts that are not wake enabled, so that if
they occur during suspend, the system is not awoken. Hence,
IRQCHIP_MASK_ON_SUSPEND.
Note that IRQCHIP_MASK_ON_SUSPEND is handled by check_wakeup_irqs(),
which always iterates over every single interrupt in the system,
irrespective of whether an interrupt is a child of a controller whose
output interrupt has no wake-enabled inputs and hence is presumably
masked itself. Hence this change might cause interrupt unnecessary
masking operations and associated register I/O.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/xen/manage.c')
0 files changed, 0 insertions, 0 deletions