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author | Bjorn Helgaas <bjorn.helgaas@hp.com> | 2006-01-30 16:32:31 -0700 |
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committer | Tony Luck <tony.luck@intel.com> | 2006-02-02 13:25:54 -0800 |
commit | a58786917ce23c2a26c3e099c3cdba32a35eeceb (patch) | |
tree | 4740de51febbe16934d24d94cb80432a7547cb26 /include/asm-ia64/processor.h | |
parent | af14aca90e0cdfccd71f9947c45b6ea2cf321dcb (diff) | |
download | kernel_goldelico_gta04-a58786917ce23c2a26c3e099c3cdba32a35eeceb.zip kernel_goldelico_gta04-a58786917ce23c2a26c3e099c3cdba32a35eeceb.tar.gz kernel_goldelico_gta04-a58786917ce23c2a26c3e099c3cdba32a35eeceb.tar.bz2 |
[IA64] avoid broken SAL_CACHE_FLUSH implementations
If SAL_CACHE_FLUSH drops interrupts, complain about it and fall back to
using PAL_CACHE_FLUSH instead.
This is to work around a defect in HP rx5670 firmware: when an interrupt
occurs during SAL_CACHE_FLUSH, SAL drops the interrupt but leaves it marked
"in-service", which leaves the interrupt (and others of equal or lower
priority) masked.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/processor.h')
-rw-r--r-- | include/asm-ia64/processor.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h index 09b9902..23c8e1b 100644 --- a/include/asm-ia64/processor.h +++ b/include/asm-ia64/processor.h @@ -559,6 +559,23 @@ ia64_eoi (void) #define cpu_relax() ia64_hint(ia64_hint_pause) +static inline int +ia64_get_irr(unsigned int vector) +{ + unsigned int reg = vector / 64; + unsigned int bit = vector % 64; + u64 irr; + + switch (reg) { + case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break; + case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break; + case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break; + case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break; + } + + return test_bit(bit, &irr); +} + static inline void ia64_set_lrr0 (unsigned long val) { |