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author | Ralf Baechle <ralf@linux-mips.org> | 2005-12-08 14:04:24 +0000 |
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committer | <ralf@denk.linux-mips.net> | 2006-01-10 13:39:06 +0000 |
commit | b4672d37293cb045ec4d57e8b76a62810c96da71 (patch) | |
tree | 21ba827850d7bc7c36d7009575b979d12b35227c /include/asm-mips/cpu-features.h | |
parent | e7958bb90d57f0da073cbd031a1808de51d1de15 (diff) | |
download | kernel_goldelico_gta04-b4672d37293cb045ec4d57e8b76a62810c96da71.zip kernel_goldelico_gta04-b4672d37293cb045ec4d57e8b76a62810c96da71.tar.gz kernel_goldelico_gta04-b4672d37293cb045ec4d57e8b76a62810c96da71.tar.bz2 |
MIPS: Introduce machinery for testing for MIPSxxR1/2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu-features.h')
-rw-r--r-- | include/asm-mips/cpu-features.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 03627cfb..f8be4a4 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -144,6 +144,18 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 0 # endif +# ifndef cpu_has_mips32r1 +# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) +# endif +# ifndef cpu_has_mips32r2 +# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) +# endif +# ifndef cpu_has_mips64r1 +# define cpu_has_mips64r1 0 +# endif +# ifndef cpu_has_mips64r2 +# define cpu_has_mips64r2 0 +# endif #endif #ifdef CONFIG_64BIT @@ -162,6 +174,18 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 1 # endif +# ifndef cpu_has_mips32r1 +# define cpu_has_mips32r1 0 +# endif +# ifndef cpu_has_mips32r2 +# define cpu_has_mips32r2 0 +# endif +# ifndef cpu_has_mips64r1 +# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) +# endif +# ifndef cpu_has_mips64r2 +# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) +# endif #endif #ifdef CONFIG_CPU_MIPSR2 |