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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-01-26 17:10:45 -0800 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2009-02-08 21:38:02 +1000 |
| commit | 0f973f27888e4664b253ab2cf69c67c2eb80ab1b (patch) | |
| tree | 1f921af14dff65311dd10106dfc10778e3730b1e /include/drm | |
| parent | d9ddcb96e05cfbadf3dbf66859bcaf5eae25af0b (diff) | |
| download | kernel_goldelico_gta04-0f973f27888e4664b253ab2cf69c67c2eb80ab1b.zip kernel_goldelico_gta04-0f973f27888e4664b253ab2cf69c67c2eb80ab1b.tar.gz kernel_goldelico_gta04-0f973f27888e4664b253ab2cf69c67c2eb80ab1b.tar.bz2 | |
drm/i915: add fence register management to execbuf
Adds code to set up fence registers at execbuf time on pre-965 chips as
necessary. Also fixes up a few bugs in the pre-965 tile register support
(get_order != ffs). The number of fences available to the kernel defaults
to the hw limit minus 3 (for legacy X front/back/depth), but a new parameter
allows userspace to override that as needed.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/i915_drm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index b3bcf72..912cd52 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -261,6 +261,7 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_LAST_DISPATCH 3 #define I915_PARAM_CHIPSET_ID 4 #define I915_PARAM_HAS_GEM 5 +#define I915_PARAM_NUM_FENCES_AVAIL 6 typedef struct drm_i915_getparam { int param; @@ -272,6 +273,7 @@ typedef struct drm_i915_getparam { #define I915_SETPARAM_USE_MI_BATCHBUFFER_START 1 #define I915_SETPARAM_TEX_LRU_LOG_GRANULARITY 2 #define I915_SETPARAM_ALLOW_BATCHBUFFER 3 +#define I915_SETPARAM_NUM_USED_FENCES 4 typedef struct drm_i915_setparam { int param; |