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| author | Yevgeny Petrilin <yevgenyp@mellanox.co.il> | 2008-10-22 10:25:29 -0700 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2008-10-22 10:25:29 -0700 |
| commit | 93fc9e1bb6507dde945c2eab68c93e1066ac3691 (patch) | |
| tree | aa495ec31b7372580f9ec50acead1d170fd70aab /include/linux/mlx4 | |
| parent | a3cdcbfa8fb1fccfe48d359da86e99546610c562 (diff) | |
| download | kernel_goldelico_gta04-93fc9e1bb6507dde945c2eab68c93e1066ac3691.zip kernel_goldelico_gta04-93fc9e1bb6507dde945c2eab68c93e1066ac3691.tar.gz kernel_goldelico_gta04-93fc9e1bb6507dde945c2eab68c93e1066ac3691.tar.bz2 | |
mlx4_core: Support multiple pre-reserved QP regions
For ethernet support, we need to reserve QPs for the ethernet and
fibre channel driver. The QPs are reserved at the end of the QP
table. (This way we assure that they are aligned to their size)
We need to consider these reserved ranges in bitmap creation, so we
extend the mlx4 bitmap utility functions to allow reserved ranges at
both the bottom and the top of the range.
Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'include/linux/mlx4')
| -rw-r--r-- | include/linux/mlx4/device.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index d21e879..693f93c 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -145,6 +145,18 @@ enum { MLX4_MTT_FLAG_PRESENT = 1 }; +enum mlx4_qp_region { + MLX4_QP_REGION_FW = 0, + MLX4_QP_REGION_ETH_ADDR, + MLX4_QP_REGION_FC_ADDR, + MLX4_QP_REGION_FC_EXCH, + MLX4_NUM_QP_REGION +}; + +enum { + MLX4_NUM_FEXCH = 64 * 1024, +}; + static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) { return (major << 32) | (minor << 16) | subminor; @@ -169,7 +181,6 @@ struct mlx4_caps { int max_rq_desc_sz; int max_qp_init_rdma; int max_qp_dest_rdma; - int reserved_qps; int sqp_start; int num_srqs; int max_srq_wqes; @@ -201,6 +212,12 @@ struct mlx4_caps { u16 stat_rate_support; u8 port_width_cap[MLX4_MAX_PORTS + 1]; int max_gso_sz; + int reserved_qps_cnt[MLX4_NUM_QP_REGION]; + int reserved_qps; + int reserved_qps_base[MLX4_NUM_QP_REGION]; + int log_num_macs; + int log_num_vlans; + int log_num_prios; }; struct mlx4_buf_list { |