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| author | Archit Taneja <archit@ti.com> | 2011-09-05 16:48:27 +0530 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-09-30 16:16:30 +0300 |
| commit | 8af6ff0107f0720b8fbf4feca7031d3e36c2fa11 (patch) | |
| tree | 7051173d9638281697aaa695fb9e51e0b898f7c5 /include/video | |
| parent | 18b7d09908fdef8755d934a0c37d709e94e8461a (diff) | |
| download | kernel_goldelico_gta04-8af6ff0107f0720b8fbf4feca7031d3e36c2fa11.zip kernel_goldelico_gta04-8af6ff0107f0720b8fbf4feca7031d3e36c2fa11.tar.gz kernel_goldelico_gta04-8af6ff0107f0720b8fbf4feca7031d3e36c2fa11.tar.bz2 | |
OMAP: DSS2: DSI Video mode support
Add initial support for DSI video mode panels:
- Add a new structure omap_dss_dsi_videomode_data in the member "panel" in
omap_dss_device struct. This allows panel driver to configure dsi video_mode
specific parameters.
- Configure basic DSI video mode timing parameters: HBP, HFP, HSA, VBP, VFP, VSA,
TL and VACT.
- Configure DSI protocol engine registers for video_mode support.
- Introduce functions dsi_video_mode_enable() and dsi_video_mode_disable() which
enable/disable video mode for a given virtual channel and a given pixel format
type.
Things left for later
- Add functions to check for errors in video mode timings provided by panel.
- Configure timing registers required for command mode interleaving.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'include/video')
| -rw-r--r-- | include/video/omapdss.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 89a9c29..44f423f 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -228,6 +228,35 @@ void rfbi_bus_lock(void); void rfbi_bus_unlock(void); /* DSI */ + +struct omap_dss_dsi_videomode_data { + /* DSI video mode blanking data */ + /* Unit: byte clock cycles */ + u16 hsa; + u16 hfp; + u16 hbp; + /* Unit: line clocks */ + u16 vsa; + u16 vfp; + u16 vbp; + + /* DSI blanking modes */ + int blanking_mode; + int hsa_blanking_mode; + int hbp_blanking_mode; + int hfp_blanking_mode; + + /* Video port sync events */ + int vp_de_pol; + int vp_hsync_pol; + int vp_vsync_pol; + bool vp_vsync_end; + bool vp_hsync_end; + + bool ddr_clk_always_on; + int window_sync; +}; + void dsi_bus_lock(struct omap_dss_device *dssdev); void dsi_bus_unlock(struct omap_dss_device *dssdev); int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data, @@ -258,6 +287,8 @@ int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, u16 len); int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel); int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel); +int dsi_video_mode_enable(struct omap_dss_device *dssdev, int channel); +void dsi_video_mode_disable(struct omap_dss_device *dssdev, int channel); /* Board specific data */ struct omap_dss_board_info { @@ -505,6 +536,7 @@ struct omap_dss_device { enum omap_dss_dsi_pixel_format dsi_pix_fmt; enum omap_dss_dsi_mode dsi_mode; + struct omap_dss_dsi_videomode_data dsi_vm_data; } panel; struct { |