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| author | Sheng Yang <sheng.yang@intel.com> | 2008-09-11 15:27:50 +0800 |
|---|---|---|
| committer | Avi Kivity <avi@qumranet.com> | 2008-10-15 10:16:14 +0200 |
| commit | defed7ed926eca9f178a632df05baa866abe754e (patch) | |
| tree | 840967616f6fcd696c62ed9f8328fe671bdea18b /include | |
| parent | 9ea542facbd0fd12a53e169953a3fdd6d0364532 (diff) | |
| download | kernel_goldelico_gta04-defed7ed926eca9f178a632df05baa866abe754e.zip kernel_goldelico_gta04-defed7ed926eca9f178a632df05baa866abe754e.tar.gz kernel_goldelico_gta04-defed7ed926eca9f178a632df05baa866abe754e.tar.bz2 | |
x86: Move FEATURE_CONTROL bits to msr-index.h
For MSR_IA32_FEATURE_CONTROL is already there.
Signed-off-by: Sheng Yang <sheng.yang@intel.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-x86/msr-index.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h index 0bb4330..dabd10f 100644 --- a/include/asm-x86/msr-index.h +++ b/include/asm-x86/msr-index.h @@ -178,6 +178,9 @@ #define MSR_IA32_EBL_CR_POWERON 0x0000002a #define MSR_IA32_FEATURE_CONTROL 0x0000003a +#define FEATURE_CONTROL_LOCKED (1<<0) +#define FEATURE_CONTROL_VMXON_ENABLED (1<<2) + #define MSR_IA32_APICBASE 0x0000001b #define MSR_IA32_APICBASE_BSP (1<<8) #define MSR_IA32_APICBASE_ENABLE (1<<11) |