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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2008-08-04 20:53:57 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-09-05 21:24:11 +0100 |
| commit | e0cee3eea7875800451739ae38f99edcf11c133d (patch) | |
| tree | 411a044d9094582cb26963a6cee72fd4c594e9fb /include | |
| parent | 0510617b85758b6e66f3c602ceccea1826440470 (diff) | |
| download | kernel_goldelico_gta04-e0cee3eea7875800451739ae38f99edcf11c133d.zip kernel_goldelico_gta04-e0cee3eea7875800451739ae38f99edcf11c133d.tar.gz kernel_goldelico_gta04-e0cee3eea7875800451739ae38f99edcf11c133d.tar.bz2 | |
[MIPS] Fix WARNING: at kernel/smp.c:290
trap_init issues flush_icache_range(), which uses ipi functions to
get icache flushing done on all cpus. But this is done before interrupts
are enabled and caused WARN_ON messages. This changeset introduces
a new local_flush_icache_range() and uses it before interrupts (and
additional CPUs) are enabled to avoid this problem.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-mips/cacheflush.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index d5c0f2f..03b1d69 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -63,6 +63,7 @@ static inline void flush_icache_page(struct vm_area_struct *vma, } extern void (*flush_icache_range)(unsigned long start, unsigned long end); +extern void (*local_flush_icache_range)(unsigned long start, unsigned long end); extern void (*__flush_cache_vmap)(void); |