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author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-01-26 15:36:53 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2013-02-01 10:45:34 +0100 |
commit | 9f5b6b30f985bae6e0ad7c5a707a4e781957e773 (patch) | |
tree | f1081f1897b9a6bc65ba33a87bb2d1e165147ba7 /mm | |
parent | ae1575f71152627f0d443853c42319b2f1404eb9 (diff) | |
download | kernel_goldelico_gta04-9f5b6b30f985bae6e0ad7c5a707a4e781957e773.zip kernel_goldelico_gta04-9f5b6b30f985bae6e0ad7c5a707a4e781957e773.tar.gz kernel_goldelico_gta04-9f5b6b30f985bae6e0ad7c5a707a4e781957e773.tar.bz2 |
ARM: pinctrl: sunxi: Add the pinctrl pin set for Allwinner A10
Since the Allwinner SoCs variants don't have the same set of pins to
handle, we need to declare the pin ranges available.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions