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author | Paul Mundt <lethal@linux-sh.org> | 2011-06-08 18:51:32 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2011-06-08 18:51:32 +0900 |
commit | 514820eb982eb85677ed2ecef9710e90e24fbdab (patch) | |
tree | 656eb4a0d96ec3e6ac843109cccec862bfcc988e /security/integrity | |
parent | debf9507166eede1e676d27d3298cdfb27399cb4 (diff) | |
download | kernel_goldelico_gta04-514820eb982eb85677ed2ecef9710e90e24fbdab.zip kernel_goldelico_gta04-514820eb982eb85677ed2ecef9710e90e24fbdab.tar.gz kernel_goldelico_gta04-514820eb982eb85677ed2ecef9710e90e24fbdab.tar.bz2 |
serial: sh-sci: Consolidate RXD pin handling.
Non-SCI parts do not have the special port reg necessary for cases where
the RX and SCI pins are muxed and need to be manually polled, so these
like always fall back on the normal FIFO processing paths. SH7760 is in a
class in and of itself with regards to mapping its SIM card interface via
the SCI port class despite not having any of the RXD lines wired up and
so implicitly behaving more like a SCIF in this regard. Out of the other
CPUs, some support the port check via the same block while others do it
through an external SuperI/O, so it's not even possible to perform the
check relative to the ioremapped cookie offset, so the separate read
semantics are preserved here, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'security/integrity')
0 files changed, 0 insertions, 0 deletions