diff options
author | Charles Keepax <ckeepax@opensource.wolfsonmicro.com> | 2013-08-06 17:03:55 +0100 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-08-06 17:41:33 +0100 |
commit | c7f3843575eac1eea1fbda2f6b61d36627fa8f7c (patch) | |
tree | b656347ecb90005dc2c002e558e19b8965deb4e1 /sound/soc/codecs/wm5110.c | |
parent | b79fae606c921522577f3000b6b9a807cd733d2e (diff) | |
download | kernel_goldelico_gta04-c7f3843575eac1eea1fbda2f6b61d36627fa8f7c.zip kernel_goldelico_gta04-c7f3843575eac1eea1fbda2f6b61d36627fa8f7c.tar.gz kernel_goldelico_gta04-c7f3843575eac1eea1fbda2f6b61d36627fa8f7c.tar.bz2 |
ASoC: wm5110: Correct input OSR bits for wm5110
The input OSR bits are specified differently for wm5110 than for current
revs of wm5102. This patch corrects support for this on wm5110.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/codecs/wm5110.c')
-rw-r--r-- | sound/soc/codecs/wm5110.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index fc41037..77fd531 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -58,14 +58,10 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) static const struct snd_kcontrol_new wm5110_snd_controls[] = { -SOC_SINGLE("IN1 High Performance Switch", ARIZONA_IN1L_CONTROL, - ARIZONA_IN1_OSR_SHIFT, 1, 0), -SOC_SINGLE("IN2 High Performance Switch", ARIZONA_IN2L_CONTROL, - ARIZONA_IN2_OSR_SHIFT, 1, 0), -SOC_SINGLE("IN3 High Performance Switch", ARIZONA_IN3L_CONTROL, - ARIZONA_IN3_OSR_SHIFT, 1, 0), -SOC_SINGLE("IN4 High Performance Switch", ARIZONA_IN4L_CONTROL, - ARIZONA_IN4_OSR_SHIFT, 1, 0), +SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), +SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), +SOC_ENUM("IN3 OSR", arizona_in_dmic_osr[2]), +SOC_ENUM("IN4 OSR", arizona_in_dmic_osr[3]), SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), |