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* compiler/gcc4: Add quirk for 'asm goto' miscompilation bugIngo Molnar2013-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | Fengguang Wu, Oleg Nesterov and Peter Zijlstra tracked down a kernel crash to a GCC bug: GCC miscompiles certain 'asm goto' constructs, as outlined here: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 Implement a workaround suggested by Jakub Jelinek. Reported-and-tested-by: Fengguang Wu <fengguang.wu@intel.com> Reported-by: Oleg Nesterov <oleg@redhat.com> Reported-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Suggested-by: Jakub Jelinek <jakub@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: <stable@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org>
* MIPS: cpu-features.h: s/MIPS53/MIPS64/Maciej W. Rozycki2013-09-241-1/+1
| | | | | | | | | No support for MIPS53 processors yet. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5876/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add MIPS R5 config5 register.Ralf Baechle2013-09-191-0/+7
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PCI: Use pci_resource_to_user to map pci memory space properlyWolfgang Grandegger2013-09-191-0/+12
| | | | | | | | | | | [ralf@linux-mips.org: This only matters to Alchemy platforms. On other platforms fixup_bigphys_addr is just an identidy mapping.] Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: tiejun.chen <tiejun.chen@windriver.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1868/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Cleanup CP0 PRId and CP1 FPIR register access masksMaciej W. Rozycki2013-09-182-10/+32
| | | | | | | | | | Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout. The change does not touch places that use shifted or partial masks. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix VGA_MAP_MEM macro.Leonid Yegoshin2013-09-181-1/+2
| | | | | | | | | | | | Use the CKSEG1ADDR macro when calculating VGA_MAP_MEM. [ralf@linux-mips.org: Include <asm/addrspace.h for CKSEG1ADDR.] Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5814/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Reimplement get_cycles().Ralf Baechle2013-09-181-1/+32
| | | | | | | | | | | | | This essentially reverts commit efb9ca08b5a2374b29938cdcab417ce4feb14b54 (kernel.org) / 58020a106879a8b372068741c81f0015c9b0b96dbv [[MIPS] Change get_cycles to always return 0.] Most users of get_cycles() invoke it as a timing interface. That's why in modern kernels it was never very much missed for. /dev/random however uses get_cycles() in the how the jitter in the interrupt timing contains some useful entropy. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Optimize current_cpu_type() for better code.Ralf Baechle2013-09-175-6/+209
| | | | | | | | | | | | | o Move current_cpu_type() to a separate header file o #ifdefing on supported CPU types lets modern GCC know that certain code in callers may be discarded ideally turning current_cpu_type() into a function returning a constant. o Use current_cpu_type() rather than direct access to struct cpuinfo_mips. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5833/
* MIPS: Provide nice way to access boot CPU's data.Ralf Baechle2013-09-171-0/+1
| | | | | | | | boot_cpu_data is used the same as current_cpu_data but returns the CPU data for CPU 0. This means it doesn't have to use smp_processor_id() thus no need to disable preemption. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: DECstation I/O ASIC DMA interrupt handling fixMaciej W. Rozycki2013-09-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This change complements commit d0da7c002f7b2a93582187a9e3f73891a01d8ee4 and brings clear_ioasic_irq back, renaming it to clear_ioasic_dma_irq at the same time, to make I/O ASIC DMA interrupts functional. Unlike ordinary I/O ASIC interrupts DMA interrupts need to be deasserted by software by writing 0 to the respective bit in I/O ASIC's System Interrupt Register (SIR), similarly to how CP0.Cause.IP0 and CP0.Cause.IP1 bits are handled in the CPU (the difference is SIR DMA interrupt bits are R/W0C so there's no need for an RMW cycle). Otherwise the handler is reentered over and over again. The only current user is the DEC LANCE Ethernet driver and its extremely uncommon DMA memory error handler that does not care when exactly the interrupt is cleared. Anticipating the use of DMA interrupts by the Zilog SCC driver this change however exports clear_ioasic_dma_irq for device drivers to choose the right application-specific sequence to clear the request explicitly rather than calling it implicitly in the .irq_eoi handler of `struct irq_chip'. Previously these interrupts were cleared in the .end handler of the said structure, before it was removed. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5826/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: DECstation HRT initialization rearrangementMaciej W. Rozycki2013-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not all I/O ASIC versions have the free-running counter implemented, an early revision used in the 5000/1xx models aka 3MIN and 4MIN did not have it. Therefore we cannot unconditionally use it as a clock source. Fortunately if not implemented its register slot has a fixed value so it is enough if we check for the value at the end of the calibration period being the same as at the beginning. This also means we need to look for another high-precision clock source on the systems affected. The 5000/1xx can have an R4000SC processor installed where the CP0 Count register can be used as a clock source. Unfortunately all the R4k DECstations suffer from the missed timer interrupt on CP0 Count reads erratum, so we cannot use the CP0 timer as a clock source and a clock event both at a time. However we never need an R4k clock event device because all DECstations have a DS1287A RTC chip whose periodic interrupt can be used as a clock source. This gives us the following four configuration possibilities for I/O ASIC DECstations: 1. No I/O ASIC counter and no CP0 timer, e.g. R3k 5000/1xx (3MIN). 2. No I/O ASIC counter but the CP0 timer, i.e. R4k 5000/150 (4MIN). 3. The I/O ASIC counter but no CP0 timer, e.g. R3k 5000/240 (3MAX+). 4. The I/O ASIC counter and the CP0 timer, e.g. R4k 5000/260 (4MAX+). For #1 and #2 this change stops the I/O ASIC free-running counter from being installed as a clock source of a 0Hz frequency. For #2 it also arranges for the CP0 timer to be used as a clock source rather than a clock event device, because having an accurate wall clock is more important than a high-precision interval timer. For #3 there is no change. For #4 the change makes the I/O ASIC free-running counter installed as a clock source so that the CP0 timer can be used as a clock event device. Unfortunately the use of the CP0 timer as a clock event device relies on a succesful completion of c0_compare_interrupt. That never happens, because while waiting for a CP0 Compare interrupt to happen the function spins in a loop reading the CP0 Count register. This makes the CP0 Count erratum trigger reliably causing the interrupt waited for to be lost in all cases. As a result #4 resorts to using the CP0 timer as a clock source as well, just as #2. However we want to keep this separate arrangement in case (hope) c0_compare_interrupt is eventually rewritten such that it avoids the erratum. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5825/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-09-1231-104/+280
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "This has been sitting in -next for a while with no objections and all MIPS defconfigs except one are building fine; that one platform got broken by another patch in your tree and I'm going to submit a patch separately. - a handful of fixes that didn't make 3.11 - a few bits of Octeon 3 support with more to come for a later release - platform enhancements for Octeon, ath79, Lantiq, Netlogic and Ralink SOCs - a GPIO driver for the Octeon - some dusting off of the DECstation code - the usual dose of cleanups" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (65 commits) MIPS: DMA: Fix BUG due to smp_processor_id() in preemptible code MIPS: kexec: Fix random crashes while loading crashkernel MIPS: kdump: Skip walking indirection page for crashkernels MIPS: DECstation HRT calibration bug fixes MIPS: Export copy_from_user_page() (needed by lustre) MIPS: Add driver for the built-in PCI controller of the RT3883 SoC MIPS: DMA: For BMIPS5000 cores flush region just like non-coherent R10000 MIPS: ralink: Add support for reset-controller API MIPS: ralink: mt7620: Add cpu-feature-override header MIPS: ralink: mt7620: Add spi clock definition MIPS: ralink: mt7620: Add wdt clock definition MIPS: ralink: mt7620: Improve clock frequency detection MIPS: ralink: mt7620: This SoC has EHCI and OHCI hosts MIPS: ralink: mt7620: Add verbose ram info MIPS: ralink: Probe clocksources from OF MIPS: ralink: Add support for systick timer found on newer ralink SoC MIPS: ralink: Add support for periodic timer irq MIPS: Netlogic: Built-in DTB for XLP2xx SoC boards MIPS: Netlogic: Add support for USB on XLP2xx MIPS: Netlogic: XLP2xx update for I2C controller ...
| * MIPS: ralink: mt7620: Add cpu-feature-override headerGabor Juhos2013-09-041-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Override certain CPU features to help GCC to optimize the generated code. Saves about 150KB in the vmlinux image with a generic configuration. text data bss dec hex filename 3824158 134820 234192 4193170 3ffb92 vmlinux.no-override 3664054 138804 234192 4037050 3d99ba vmlinux.override Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5759/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: ralink: mt7620: Improve clock frequency detectionGabor Juhos2013-09-041-8/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code assumes that the peripheral clock always runs at 40MHz which is not true in all configuration. The peripheral clock can also use the reference clock instead of the fixed 40MHz rate. If the reference clock runs at a different rate, various peripheries are behaving incorrectly. Additionally, the currectly calculated system clock is also wrong. The actual value what the code computes is the rate of the DRAM which can be different from the system clock. Add new helper functions to get the rate of the different clocks and use the correct values for the registered clock devices. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5755/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Netlogic: Add support for USB on XLP2xxGanesan Ramalingam2013-09-032-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Add USB intialization code to handle the new XLP2XX USB 3.0 block. This adds xlp/usb-init-xlp2.c to initialize the XLP2XX USB glue-logic for XHCI and EHCI. Interrupt and IO offset code in xlp-hal/iomap.h and xlp/nlm_hal.c is also updated for the new USB block. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5744/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Netlogic: XLP2xx update for I2C controllerGanesan Ramalingam2013-09-032-0/+5
| | | | | | | | | | | | | | | | | | | | | | XLP2xx has a new I2C controller which has 4 buses connected to it. Update the IO offset and IRQ mapping code to reflect this. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5707/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Netlogic: XLP2XX CPU and PIC frequencyGanesan Ramalingam2013-09-033-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | Add code to calculate the CPU and PIC frequency for XLP2XX SoCs. Since the PIC frequency on XLP2XX can be configured, add a new macro pic_timer_freq() to be used in netlogic/common/time.c. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5701/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Netlogic: Add support for XLP2XXJayachandran C2013-09-032-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | XLP2XX is first in the series of 28nm XLPII processors. The changes are to: * Add processor ID for XLP2XX to asm/cpu.h and kernel/cpu-probe.c. * Add a cpu_is_xlpii() function to check for XLPII processors. * Update xlp_mmu_init() to use config4 to enable extended TLB. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5698/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Netlogic: Read memory from DRAM BARsJayachandran C2013-09-032-0/+7
| | | | | | | | | | | | | | | | | | | | | | Read the memory from the Bridge DRAM BARs, if it is not passed in from the device tree. This will allow us to remove memory configuration from built in device trees. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5743/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: ath79: Don't hardwire cpu_has_dsp{2} to 0Gabor Juhos2013-09-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ath79 code supports various SoCs which are using either a 24Kc or a 74Kc core. The 74Kc core has DSP support, so don't hardwire the values to zero. Commit 00dc5ce2a653a332190aa29b2e1f3bceaa7d5b8d (MIPS: ath79: don't hardcode the unavailability of the DSP ASE) has fixed this already, but that change got reverted by 475032564ed96c94c085e3e7a90e07d150a7cec9 (MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.) Reported-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5750/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Lantiq: Falcon: add cpu-feature-override.hThomas Langer2013-09-031-0/+58
| | | | | | | | | | | | | | | | | | | | Add cpu-feature-override.h for the GPON SoC Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5658/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Move declaration of Octeon function fixup_irqs() to header.Ralf Baechle2013-09-031-0/+2
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: OCTEON: Select ARCH_REQUIRE_GPIOLIBDavid Daney2013-08-261-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ... and create asm/mach-cavium-octeon/gpio.h so that things continue to build. This allows us to use the existing I2C connected GPIO expanders. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5632/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BMIPS: Fix compilation for BMIPS5000Ralf Baechle2013-08-261-33/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 02b849f7613003fe5f9e58bf233d49b0ebd4a5e8 ("MIPS: Get rid of the use of .macro in C code.") replaced the macro usage but missed the accessors in bmips.h, causing the following build error: CC arch/mips/kernel/smp-bmips.o {standard input}: Assembler messages: {standard input}:951: Error: Unrecognized opcode `_ssnop' {standard input}:952: Error: Unrecognized opcode `_ssnop' (...) make[6]: *** [arch/mips/kernel/smp-bmips.o] Error 1 Fix by rewriting the inline assembler using existing inline functions. The generated code should stay unchanged. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5644/ Reviewed-by: Jonas Gorski <jogo@openwrt.org>
| * MIPS: Add CPU identifiers for more OCTEON family members.David Daney2013-08-261-1/+4
| | | | | | | | | | | | | | | | | | Needed to support new SOCs. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5634/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: use generic-y where possibleJames Hogan2013-08-2617-58/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use generic-y and remove headers in arch/mips/include/[uapi/]asm/Kbuild where the header just includes or is identical to the corresponding <asm-generic/*.h>. We can't do the same for uapi/asm/kvm_para.h because it's presence is explicitly checked in include/uapi/linux/Kbuild to decide whether to add kvm_para.h to header-y. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: Tejun Heo <tj@kernel.org> Cc: Dave Jones <davej@redhat.com> Cc: David Howells <dhowells@redhat.com> Cc: David Sharp <dhsharp@google.com> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5581/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Merge tag 'for-linus-20130909' of git://git.infradead.org/linux-mtdLinus Torvalds2013-09-091-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull mtd updates from David Woodhouse: - factor out common code from MTD tests - nand-gpio cleanup and portability to non-ARM - m25p80 support for 4-byte addressing chips, other new chips - pxa3xx cleanup and support for new platforms - remove obsolete alauda, octagon-5066 drivers - erase/write support for bcm47xxsflash - improve detection of ECC requirements for NAND, controller setup - NFC acceleration support for atmel-nand, read/write via SRAM - etc * tag 'for-linus-20130909' of git://git.infradead.org/linux-mtd: (184 commits) mtd: chips: Add support for PMC SPI Flash chips in m25p80.c mtd: ofpart: use for_each_child_of_node() macro mtd: mtdswap: replace strict_strtoul() with kstrtoul() mtd cs553x_nand: use kzalloc() instead of memset mtd: atmel_nand: fix error return code in atmel_nand_probe() mtd: bcm47xxsflash: writing support mtd: bcm47xxsflash: implement erasing support mtd: bcm47xxsflash: convert to module_platform_driver instead of init/exit mtd: bcm47xxsflash: convert kzalloc to avoid invalid access mtd: remove alauda driver mtd: nand: mxc_nand: mark 'const' properly mtd: maps: cfi_flagadm: add missing __iomem annotation mtd: spear_smi: add missing __iomem annotation mtd: r852: Staticize local symbols mtd: nandsim: Staticize local symbols mtd: impa7: add missing __iomem annotation mtd: sm_ftl: Staticize local symbols mtd: m25p80: add support for mr25h10 mtd: m25p80: make CONFIG_M25PXX_USE_FAST_READ safe to enable mtd: m25p80: Pass flags through CAT25_INFO macro ...
| * | MIPS: BCM63XX: export PSI size from nvramJonas Gorski2013-08-051-0/+2
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jonas Gorski <jogo@openwrt.org> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | | Merge tag 'tegra-for-3.12-soc' of ↵Kevin Hilman2013-08-211-5/+0
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc From: Stephen Warren: ARM: tegra: core SoC enhancements for 3.12 This branch includes a number of enhancements to core SoC support for Tegra devices. The major new features are: * Adds a new CPU-power-gated cpuidle state for Tegra114. * Adds initial system suspend support for Tegra114, initially supporting just CPU-power-gating during suspend. * Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode both gates CPU power, and places the DRAM into self-refresh mode. * A new DT-driven PCIe driver to Tegra20/30. The driver is also moved from arch/arm/mach-tegra/ to drivers/pci/host/. The PCIe driver work depends on the following tag from Thomas Petazzoni: git://git.infradead.org/linux-mvebu.git mis-3.12.2 ... which is merged into the middle of this pull request. * tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (33 commits) ARM: tegra: disable LP2 cpuidle state if PCIe is enabled MAINTAINERS: Add myself as Tegra PCIe maintainer PCI: tegra: set up PADS_REFCLK_CFG1 PCI: tegra: Add Tegra 30 PCIe support PCI: tegra: Move PCIe driver to drivers/pci/host PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms ARM: tegra: add LP1 suspend support for Tegra114 ARM: tegra: add LP1 suspend support for Tegra20 ARM: tegra: add LP1 suspend support for Tegra30 ARM: tegra: add common LP1 suspend support clk: tegra114: add LP1 suspend/resume support ARM: tegra: config the polarity of the request of sys clock ARM: tegra: add common resume handling code for LP1 resuming ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci of: pci: add registry of MSI chips PCI: Introduce new MSI chip infrastructure PCI: remove ARCH_SUPPORTS_MSI kconfig option PCI: use weak functions for MSI arch-specific functions ARM: tegra: unify Tegra's Kconfig a bit more ARM: tegra: remove the limitation that Tegra114 can't support suspend ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * | PCI: use weak functions for MSI arch-specific functionsThomas Petazzoni2013-08-121-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now, the MSI architecture-specific functions could be overloaded using a fairly complex set of #define and compile-time conditionals. In order to prepare for the introduction of the msi_chip infrastructure, it is desirable to switch all those functions to use the 'weak' mechanism. This commit converts all the architectures that were overidding those MSI functions to use the new strategy. Note that we keep two separate, non-weak, functions default_teardown_msi_irqs() and default_restore_msi_irqs() for the default behavior of the arch_teardown_msi_irqs() and arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Daniel Price <daniel.price@gmail.com> Tested-by: Thierry Reding <thierry.reding@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: linux390@de.ibm.com Cc: linux-s390@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: x86@kernel.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: linux-ia64@vger.kernel.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: David S. Miller <davem@davemloft.net> Cc: sparclinux@vger.kernel.org Cc: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | | MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code.Ralf Baechle2013-08-051-0/+2
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | current_cpu_type() is not preemption-safe. If CONFIG_PREEMPT is enabled then mipsxx_reg_setup() can be called from preemptible state. Added get_cpu()/put_cpu() pair to make it preemption-safe. This was found while testing oprofile with CONFIG_DEBUG_PREEMPT enable. /usr/zntestsuite # opcontrol --init /usr/zntestsuite # opcontrol --setup --event=L2_CACHE_ACCESSES:500 --event=L2_CACHE_MISSES:500 --no-vmlinux /usr/zntestsuite # opcontrol --start Using 2.6+ OProfile kernel interface. BUG: using smp_processor_id() in preemptible [00000000] code: oprofiled/1362 caller is mipsxx_reg_setup+0x11c/0x164 CPU: 0 PID: 1362 Comm: oprofiled Not tainted 3.10.4 #18 Stack : 00000006 70757465 00000000 00000000 00000000 00000000 80b173f6 00000037 80b10000 00000000 80b21614 88f5a220 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 89c49c00 89c49c2c 80721254 807b7927 8012c1d0 80b10000 80721254 00000000 00000552 88f5a220 80b1335c 807b78e6 89c49ba8 ... Call Trace: [<801099a4>] show_stack+0x64/0x7c [<80665520>] dump_stack+0x20/0x2c [<803a2250>] debug_smp_processor_id+0xe0/0xf0 [<8052df24>] mipsxx_reg_setup+0x11c/0x164 [<8052cd70>] op_mips_setup+0x24/0x4c [<80529cfc>] oprofile_setup+0x5c/0x12c [<8052b9f8>] event_buffer_open+0x78/0xf8 [<801c3150>] do_dentry_open.isra.15+0x2b8/0x3b0 [<801c3270>] finish_open+0x28/0x4c [<801d49b8>] do_last.isra.41+0x2cc/0xd00 [<801d54a0>] path_openat+0xb4/0x4c4 [<801d5c44>] do_filp_open+0x3c/0xac [<801c4744>] do_sys_open+0x110/0x1f4 [<8010f47c>] stack_done+0x20/0x44 Bug reported and original patch by Jerin Jacob <jerinjacobk@gmail.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Jerin Jacob <jerinjacobk@gmail.com>
* | MIPS: uapi/asm/siginfo.h: Fix GCC 4.1.2 compilationMaciej W. Rozycki2013-07-301-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It wasn't until GCC 4.3 I believe that the __SIZEOF_*__ predefined macros were added. The change below switches <uapi/asm/siginfo.h> to the _MIPS_SZLONG macro so that compilation with e.g. GCC 4.1.2 succeeds. This is a user API header so I think this is even more important, for older userland support. The change adds an unsuccessful default too, to catch any compiler configuration oddities. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5630/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Fix multiple definitions of UNCAC_BASE.Steven J. Hill2013-07-301-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build error below: arch/mips/include/asm/mach-generic/spaces.h:29:0: warning: "UNCAC_BASE" redefined [enabled by default] In file included from arch/mips/include/asm/addrspace.h:13:0, from arch/mips/include/asm/barrier.h:11, from arch/mips/include/asm/bitops.h:18, from include/linux/bitops.h:22, from include/linux/kernel.h:10, from include/asm-generic/bug.h:13, from arch/mips/include/asm/bug.h:41, from include/linux/bug.h:4, from include/linux/page-flags.h:9, from kernel/bounds.c:9: arch/mips/include/asm/mach-ar7/spaces.h:20:0: note: this is the location of the previous definition Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5583/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker2013-07-141-24/+13
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [ralf@linux-mips.org: Folded in Paul's followup fix.] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds2013-07-131-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking fixes from David Miller: "Just a bunch of small fixes and tidy ups: 1) Finish the "busy_poll" renames, from Eliezer Tamir. 2) Fix RCU stalls in IFB driver, from Ding Tianhong. 3) Linearize buffers properly in tun/macvtap zerocopy code. 4) Don't crash on rmmod in vxlan, from Pravin B Shelar. 5) Spinlock used before init in alx driver, from Maarten Lankhorst. 6) A sparse warning fix in bnx2x broke TSO checksums, fix from Dmitry Kravkov. 7) Dummy and ifb driver load failure paths can oops, fixes from Tan Xiaojun and Ding Tianhong. 8) Correct MTU calculations in IP tunnels, from Alexander Duyck. 9) Account all TCP retransmits in SNMP stats properly, from Yuchung Cheng. 10) atl1e and via-rhine do not handle DMA mapping failures properly, from Neil Horman. 11) Various equal-cost multipath route fixes in ipv6 from Hannes Frederic Sowa" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (36 commits) ipv6: only static routes qualify for equal cost multipathing via-rhine: fix dma mapping errors atl1e: fix dma mapping warnings tcp: account all retransmit failures usb/net/r815x: fix cast to restricted __le32 usb/net/r8152: fix integer overflow in expression net: access page->private by using page_private net: strict_strtoul is obsolete, use kstrtoul instead drivers/net/ieee802154: don't use devm_pinctrl_get_select_default() in probe drivers/net/ethernet/cadence: don't use devm_pinctrl_get_select_default() in probe drivers/net/can/c_can: don't use devm_pinctrl_get_select_default() in probe net/usb: add relative mii functions for r815x net/tipc: use %*phC to dump small buffers in hex form qlcnic: Adding Maintainers. gre: Fix MTU sizing check for gretap tunnels pkt_sched: sch_qfq: remove forward declaration of qfq_update_agg_ts pkt_sched: sch_qfq: improve efficiency of make_eligible gso: Update tunnel segmentation to support Tx checksum offload inet: fix spacing in assignment ifb: fix oops when loading the ifb failed ...
| * net: rename busy poll socket op and globalsEliezer Tamir2013-07-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename LL_SO to BUSY_POLL_SO Rename sysctl_net_ll_{read,poll} to sysctl_busy_{read,poll} Fix up users of these variables. Fix documentation for sysctl. a patch for the socket.7 man page will follow separately, because of limitations of my mail setup. Signed-off-by: Eliezer Tamir <eliezer.tamir@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-07-1345-314/+537
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "MIPS updates: - All the things that didn't make 3.10. - Removes the Windriver PPMC platform. Nobody will miss it. - Remove a workaround from kernel/irq/irqdomain.c which was there exclusivly for MIPS. Patch by Grant Likely. - More small improvments for the SEAD 3 platform - Improvments on the BMIPS / SMP support for the BCM63xx series. - Various cleanups of dead leftovers. - Platform support for the Cavium Octeon-based EdgeRouter Lite. Two large KVM patchsets didn't make it for this pull request because their respective authors are vacationing" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (124 commits) MIPS: Kconfig: Add missing MODULES dependency to VPE_LOADER MIPS: BCM63xx: CLK: Add dummy clk_{set,round}_rate() functions MIPS: SEAD3: Disable L2 cache on SEAD-3. MIPS: BCM63xx: Enable second core SMP on BCM6328 if available MIPS: BCM63xx: Add SMP support to prom.c MIPS: define write{b,w,l,q}_relaxed MIPS: Expose missing pci_io{map,unmap} declarations MIPS: Malta: Update GCMP detection. Revert "MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSET" MIPS: APSP: Remove <asm/kspd.h> SSB: Kconfig: Amend SSB_EMBEDDED dependencies MIPS: microMIPS: Fix improper definition of ISA exception bit. MIPS: Don't try to decode microMIPS branch instructions where they cannot exist. MIPS: Declare emulate_load_store_microMIPS as a static function. MIPS: Fix typos and cleanup comment MIPS: Cleanup indentation and whitespace MIPS: BMIPS: support booting from physical CPU other than 0 MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS MIPS: GIC: Fix gic_set_affinity infinite loop MIPS: Don't save/restore OCTEON wide multiplier state on syscalls. ...
| * Merge branch '3.10-fixes' into mips-for-linux-nextRalf Baechle2013-07-1213-30/+114
| |\ | | | | | | | | | | | | This that should have been fixed but weren't, way to much, intrusive and late.
| | * MIPS: microMIPS: Fix POOL16C minor opcode enumTony Wu2013-06-211-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As pointed out by Maciej, POOL16C minor opcodes were mostly shifted by one bit. Correct those opcodes, and also add jraddiusp to the enum. Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: david.daney@cavium.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5527/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: sibyte: Declare the cfe_write() buffer as constantMarkos Chandras2013-06-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The write() prototype expects a const char * as argument so declare it as such. Fixes the following build problem: arch/mips/sibyte/common/cfe_console.c:23:5: error: passing argument 2 of 'cfe_write' discards 'const' qualifier from pointer target type [-Werror] arch/mips/sibyte/common/cfe_console.c:34:4: error: passing argument 2 of 'cfe_write' makes pointer from integer without a cast [-Werror] Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: sibyte-users@bitmover.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5485/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS/OCTEON: Override default address space layout.David Daney2013-06-211-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OCTEON II cannot execute code in the default CAC_BASE space, so we supply a value (0x8000000000000000) that does work. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5457/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: malta: Remove software reset defines from generic header.Steven J. Hill2013-06-211-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the software reset register and reset value definitions from the 'include/asm/mips-boards/generic.h' header file. Also clean up header and whitespace in platform file. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5456/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: IP27: Fix build errors with CONFIG_PCI disabled.Ralf Baechle2013-06-211-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LD init/built-in.o arch/mips/built-in.o: In function `xtalk_probe_node': (.cpuinit.text+0x67c): undefined reference to `bridge_probe' arch/mips/built-in.o: In function `xtalk_probe_node': (.cpuinit.text+0x7d8): undefined reference to `bridge_probe' Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: IP27: Fix build error with CONFIG_MAPPED_KERNELRalf Baechle2013-06-211-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the TLB bit definitions in <asm/pgtable-bits.h> have become rather complex and are no longer usable from assembler resulting in an explosion like this: AS arch/mips/kernel/head.o arch/mips/kernel/head.S: Assembler messages: arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: missing ')' arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(1<<((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)' make[2]: *** [arch/mips/kernel/head.o] Error 1 Since now MAPPED_KERNEL_SETUP_TLB is in platform-specific code it's safe to hardcode the TLB bits there. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: Move gas macro MAPPED_KERNEL_SETUP_TLB to IP27-specific code.Ralf Baechle2013-06-211-0/+39
| | | | | | | | | | | | | | | | | | It's IP27-specific and can only cause trouble in head.S. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: Octeon: Fix build error if CONFIG_BUG=nDavid Daney2013-06-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CC init/do_mounts.o In file included from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/dma-mapping.h:10:0, from include/linux/dma-mapping.h:76, from include/linux/skbuff.h:33, from include/linux/icmpv6.h:4, from include/linux/ipv6.h:59, from include/net/ipv6.h:16, from include/linux/sunrpc/clnt.h:26, from include/linux/nfs_fs.h:30, from init/do_mounts.c:30: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:24:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem_page’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:30:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_addr_to_phys’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:36:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_supported’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:47:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_mapping_error’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:63:1: warning: no return statement in function returning non-void [-Wreturn-type] LD init/mounts.o CC init/init_task.o In file included from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/dma-mapping.h:10:0, from include/linux/dma-mapping.h:76, from include/linux/skbuff.h:33, from include/linux/netfilter.h:5, from include/net/netns/netfilter.h:5, from include/net/net_namespace.h:20, from include/linux/init_task.h:14, from init/init_task.c:1: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:24:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem_page’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:30:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_addr_to_phys’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:36:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_supported’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:47:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_mapping_error’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:63:1: warning: no return statement in function returning non-void [-Wreturn-type] LD init/built-in.o CC arch/mips/cavium-octeon/setup.o In file included from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/dma-mapping.h:10:0, from include/linux/dma-mapping.h:76, from include/asm-generic/pci-dma-compat.h:7, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/pci.h:129, from include/linux/pci.h:1451, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/octeon/pci-octeon.h:12, from arch/mips/cavium-octeon/setup.c:41: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:24:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem_page’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:30:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_addr_to_phys’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:36:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_supported’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:47:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_mapping_error’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:63:1: error: no return statement in function returning non-void [-Werror=return-type] cc1: all warnings being treated as errors make[2]: *** [arch/mips/cavium-octeon/setup.o] Error 1 make[1]: *** [arch/mips/cavium-octeon] Error 2 make: *** [arch/mips] Error 2 [ralf@linux-mips.org: while at it, also include <linux/bug.h> directly.] Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5519/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: <uapi/asm/siginfo.h>: Don't reference CONFIG_* symbols.Ralf Baechle2013-06-181-2/+2
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: <uapi/asm/msgbuf.h>: Don't reference CONFIG_* symbols.Ralf Baechle2013-06-181-6/+6
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: <uapi/asm/swab.h>: Don't reference CONFIG_* symbols.Ralf Baechle2013-06-181-6/+6
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: <uapi/asm/resource.h: Don't reference CONFIG_* symbols.Ralf Baechle2013-06-181-1/+1
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.1 at 2024-12-27 21:00:02 +0000