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authorFenghua Yu <fenghua.yu@intel.com>2008-04-04 11:05:59 -0700
committerTony Luck <tony.luck@intel.com>2008-04-04 11:05:59 -0700
commit2046b94e7c4fce92eb8165c2c36c6478f4927178 (patch)
tree0dbbdf17d64b521f2debcc8677368ceec8805d8c /.gitignore
parente315c121a858499d84dc88c499046b9f10bb61ec (diff)
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[IA64] Multiple outstanding ptc.g instruction support
According to SDM2.2, Itanium supports multiple outstanding ptc.g instructions. But current kernel function ia64_global_tlb_purge() uses a spinlock to serialize ptc.g instructions issued by multiple processors. This serialization might have scalability issue on a big SMP machine where many processors could purge TLB in parallel. The patch fixes this problem by issuing multiple ptc.g instructions in ia64_global_tlb_purge(). It also adds support for the "PALO" table to get a platform view of the max number of outstanding ptc.g instructions (which may be different from the processor view found from PAL_VM_SUMMARY). PALO specification can be found at: http://www.dig64.org/home/DIG64_PALO_R1_0.pdf spinaphore implementation by Matthew Wilcox. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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