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| author | Russ Anderson <rja@sgi.com> | 2006-12-07 11:06:35 -0800 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2006-12-07 11:06:35 -0800 |
| commit | 895309ff6f22a9d107e007521e44aac4400b365d (patch) | |
| tree | c15bb4563f8216ebd15eb3f156cab61b2b8bf208 | |
| parent | 6533bdedac9ae2049ae77ebd7c28c65af3619de0 (diff) | |
| download | kernel_samsung_aries-895309ff6f22a9d107e007521e44aac4400b365d.zip kernel_samsung_aries-895309ff6f22a9d107e007521e44aac4400b365d.tar.gz kernel_samsung_aries-895309ff6f22a9d107e007521e44aac4400b365d.tar.bz2 | |
[IA64] Update processor_info features
Add the printing of additional processor features to proc_features.
Based on Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software
Developer's Manual" (January 2006) fields (pages 2:430-2:432).
This patch gets the features back in sync with the spec.
Sample output before:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
XIP,XPSR,XFS implemented : On NoCtrl
XR1-XR3 implemented : On NoCtrl
Disable dynamic predicate prediction : NotImpl
Disable processor physical number : NotImpl
Disable dynamic data cache prefetch : NotImpl
Disable dynamic inst cache prefetch : NotImpl
Disable dynamic branch prediction : NotImpl
Disable BINIT on processor time-out : On Ctrl
Disable dynamic power management (DPM) : NotImpl
Disable coherency : NotImpl
Disable cache : NotImpl
Enable CMCI promotion : Off Ctrl
Enable MCA to BINIT promotion : Off Ctrl
Enable MCA promotion : NotImpl
Enable BERR promotion : NotImpl
cobra:~ #
--------------------------------------------------------------
Sample output after:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
Unimplemented instruction address fault : NotImpl
INIT, PMI, and LINT pins : NotImpl
Simple unimplimented instr addresses : On NoCtrl
Variable P-state performance : NotImpl
Virtual machine features implemeted : On NoCtrl
XIP,XPSR,XFS implemented : On NoCtrl
XR1-XR3 implemented : On NoCtrl
Disable dynamic predicate prediction : NotImpl
Disable processor physical number : NotImpl
Disable dynamic data cache prefetch : NotImpl
Disable dynamic inst cache prefetch : NotImpl
Disable dynamic branch prediction : NotImpl
Disable P-states : Off Ctrl
Enable MCA on Data Poisoning : Off Ctrl
Enable vmsw instruction : On Ctrl
Enable extern environmental notification : NotImpl
Disable BINIT on processor time-out : On Ctrl
Disable dynamic power management (DPM) : NotImpl
Disable coherency : NotImpl
Disable cache : NotImpl
Enable CMCI promotion : Off Ctrl
Enable MCA to BINIT promotion : Off Ctrl
Enable MCA promotion : NotImpl
Enable BERR promotion : NotImpl
cobra:~ #
--------------------------------------------------------------
Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
| -rw-r--r-- | arch/ia64/kernel/palinfo.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c index 0b546e2..ca1884e 100644 --- a/arch/ia64/kernel/palinfo.c +++ b/arch/ia64/kernel/palinfo.c @@ -16,6 +16,7 @@ * 02/05/2001 S.Eranian fixed module support * 10/23/2001 S.Eranian updated pal_perf_mon_info bug fixes * 03/24/2004 Ashok Raj updated to work with CPU Hotplug + * 10/26/2006 Russ Anderson updated processor features to rev 2.2 spec */ #include <linux/types.h> #include <linux/errno.h> @@ -467,7 +468,11 @@ static const char *proc_features[]={ NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL, NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL,NULL,NULL,NULL, NULL,NULL,NULL,NULL, - NULL,NULL,NULL,NULL,NULL, + "Unimplemented instruction address fault", + "INIT, PMI, and LINT pins", + "Simple unimplemented instr addresses", + "Variable P-state performance", + "Virtual machine features implemented", "XIP,XPSR,XFS implemented", "XR1-XR3 implemented", "Disable dynamic predicate prediction", @@ -475,7 +480,11 @@ static const char *proc_features[]={ "Disable dynamic data cache prefetch", "Disable dynamic inst cache prefetch", "Disable dynamic branch prediction", - NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + "Disable P-states", + "Enable MCA on Data Poisoning", + "Enable vmsw instruction", + "Enable extern environmental notification", "Disable BINIT on processor time-out", "Disable dynamic power management (DPM)", "Disable coherency", |