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authorvikram pandita <vikram.pandita@ti.com>2009-11-22 10:11:32 -0800
committerTony Lindgren <tony@atomide.com>2009-11-22 10:24:33 -0800
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omap3: zoom: Introduce zoom3 board support
Zoom3 is the next version of Zoom2 board. There has been a silicon update from zoom2 to zoom3. Zoom2 has OMAP34xx Zoom3 has OMAP3630 [1] Zoom3 = OMAP3630 SOM board [2] + same zoom2 main board [3] + same debugboard Zoom3 has a SDRAM part from Hynix Zoom2 had SDRAM part from micron Hynix memory timings are contributed by: Chalhoub, Nicole and Bour, Vincent Reuse the zoom2 files as much for zoom3, as at board level, there is no change at all. References: (courtesy Nishant Menon) [1] OMAP3630 http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606 [2] SOM boards http://logicpd.com/products/system-modules/texas-instruments-omap35x-som-lv [3] Zoom2 boards http://logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp OMAP3630: Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Cc: Nicole Chalhoub <n-chalhoub@ti.com> Cc: Vincent Bour <v-bour@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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+/*
+ * SDRC register values for the Hynix H8MBX00U0MER-0EM
+ *
+ * Copyright (C) 2009 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
+#define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
+
+#include <plat/sdrc.h>
+
+/* Hynix H8MBX00U0MER-0EM */
+static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = {
+ [0] = {
+ .rate = 200000000,
+ .actim_ctrla = 0xa2e1b4c6,
+ .actim_ctrlb = 0x0002131c,
+ .rfr_ctrl = 0x0005e601,
+ .mr = 0x00000032,
+ },
+ [1] = {
+ .rate = 166000000,
+ .actim_ctrla = 0x629db4c6,
+ .actim_ctrlb = 0x00012214,
+ .rfr_ctrl = 0x0004dc01,
+ .mr = 0x00000032,
+ },
+ [2] = {
+ .rate = 100000000,
+ .actim_ctrla = 0x51912284,
+ .actim_ctrlb = 0x0002120e,
+ .rfr_ctrl = 0x0002d101,
+ .mr = 0x00000022,
+ },
+ [3] = {
+ .rate = 83000000,
+ .actim_ctrla = 0x31512283,
+ .actim_ctrlb = 0x0001220a,
+ .rfr_ctrl = 0x00025501,
+ .mr = 0x00000022,
+ },
+ [4] = {
+ .rate = 0
+ },
+};
+
+#endif