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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2010-05-20 08:59:05 +0200 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-20 17:48:36 +0900 |
| commit | 999304be1177d42d16bc59c546228c6ac5a3e76a (patch) | |
| tree | ab8ba2b618484e93033bcc53fe0a4e014434d99f /arch/arm/mach-s3c64xx/include | |
| parent | 504d36e91ac12ccdb0e1193cee7bef9831a1c99e (diff) | |
| download | kernel_samsung_aries-999304be1177d42d16bc59c546228c6ac5a3e76a.zip kernel_samsung_aries-999304be1177d42d16bc59c546228c6ac5a3e76a.tar.gz kernel_samsung_aries-999304be1177d42d16bc59c546228c6ac5a3e76a.tar.bz2 | |
ARM: SAMSUNG: Add platform support code for OneNAND controller
This patch adds setup code for Samsung OneNAND controller driver. The
driver needs to be aware on which SoC it is running, so the actual
device id is being changed in cpu init code. S3C64xx SoCs have 2 OneNAND
controllers while S5PC100 and S5PC110 has only one.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: sort map.h entries]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c64xx/include')
| -rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/irqs.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/map.h | 13 |
2 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index e9ab4ac..8e2df26 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h @@ -212,5 +212,9 @@ #define NR_IRQS (IRQ_BOARD_END + 1) +/* Compatibility */ + +#define IRQ_ONENAND IRQ_ONENAND0 + #endif /* __ASM_MACH_S3C64XX_IRQS_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index 9fdd50c..b6fb892 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h @@ -52,6 +52,16 @@ #define S3C64XX_PA_SROM (0x70000000) +#define S3C64XX_PA_ONENAND0 (0x70100000) +#define S3C64XX_PA_ONENAND0_BUF (0x20000000) +#define S3C64XX_SZ_ONENAND0_BUF (SZ_64M) + +/* NAND and OneNAND1 controllers occupy the same register region + (depending on SoC POP version) */ +#define S3C64XX_PA_ONENAND1 (0x70200000) +#define S3C64XX_PA_ONENAND1_BUF (0x28000000) +#define S3C64XX_SZ_ONENAND1_BUF (SZ_64M) + #define S3C64XX_PA_NAND (0x70200000) #define S3C64XX_PA_FB (0x77100000) #define S3C64XX_PA_USB_HSOTG (0x7C000000) @@ -99,6 +109,9 @@ #define S3C_PA_IIC S3C64XX_PA_IIC0 #define S3C_PA_IIC1 S3C64XX_PA_IIC1 #define S3C_PA_NAND S3C64XX_PA_NAND +#define S3C_PA_ONENAND S3C64XX_PA_ONENAND0 +#define S3C_PA_ONENAND_BUF S3C64XX_PA_ONENAND0_BUF +#define S3C_SZ_ONENAND_BUF S3C64XX_SZ_ONENAND0_BUF #define S3C_PA_FB S3C64XX_PA_FB #define S3C_PA_USBHOST S3C64XX_PA_USBHOST #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG |