aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
diff options
context:
space:
mode:
authorKukjin Kim <kgene.kim@samsung.com>2010-09-01 13:23:31 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-10-18 18:33:03 +0900
commit8c14482b8a64755322484bea6fc66e8b1fd91fe0 (patch)
tree9d7e19f4951f1a4a2f2ce2c318a1fc6bafba646d /arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
parent96f2c00799f9e3c94ac5879d0289376da69bc4a5 (diff)
downloadkernel_samsung_aries-8c14482b8a64755322484bea6fc66e8b1fd91fe0.zip
kernel_samsung_aries-8c14482b8a64755322484bea6fc66e8b1fd91fe0.tar.gz
kernel_samsung_aries-8c14482b8a64755322484bea6fc66e8b1fd91fe0.tar.bz2
ARM: S5P64X0: Update Timer support
This patch updates timer support for S5P6440 and S5P6450 SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0/include/mach/pwm-clock.h')
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/pwm-clock.h68
1 files changed, 68 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
new file mode 100644
index 0000000..19fff8b
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
@@ -0,0 +1,68 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * S5P64X0 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWMCLK_H
+#define __ASM_ARCH_PWMCLK_H __FILE__
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @tcfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+ return 0;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+ return 1 << tcfg1;
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+ return 1;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+ return ilog2(div);
+}
+
+#define S3C_TCFG1_MUX_TCLK 0
+
+#endif /* __ASM_ARCH_PWMCLK_H */