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authorTodd Poynor <toddpoynor@google.com>2012-04-30 15:36:56 -0700
committerTodd Poynor <toddpoynor@google.com>2012-04-30 15:36:56 -0700
commit5c15664a86e18352ccdc2f501907725caa9ab73d (patch)
treef8289ea774881961a44d904a3f41f4c17b8facf3 /arch/arm/mm
parent80b8354d535d2e8d6ced0b0e129257dba1fb2130 (diff)
parentf1c84a5cb52ee2915457b481c756fcc1dfe6a471 (diff)
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Merge commit 'v3.0.30' into android-3.0
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/proc-v7.S12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7e47888..21cd298 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -372,6 +372,18 @@ __v7_setup:
mcr p15, 0, r5, c10, c2, 0 @ write PRRR
mcr p15, 0, r6, c10, c2, 1 @ write NMRR
#endif
+#ifndef CONFIG_ARM_THUMBEE
+ mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
+ and r0, r0, #(0xf << 12) @ ThumbEE enabled field
+ teq r0, #(1 << 12) @ check if ThumbEE is present
+ bne 1f
+ mov r5, #0
+ mcr p14, 6, r5, c1, c0, 0 @ Initialize TEEHBR to 0
+ mrc p14, 6, r0, c0, c0, 0 @ load TEECR
+ orr r0, r0, #1 @ set the 1st bit in order to
+ mcr p14, 6, r0, c0, c0, 0 @ stop userspace TEEHBR access
+1:
+#endif
adr r5, v7_crval
ldmia r5, {r5, r6}
#ifdef CONFIG_CPU_ENDIAN_BE8