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authorJassi Brar <jassi.brar@samsung.com>2010-09-29 17:31:33 +0900
committerGrant Likely <grant.likely@secretlab.ca>2010-09-29 17:31:33 +0900
commitb42a81ca0fa7b3b442a0731ffc4e7db44464b5f2 (patch)
tree3f435d56cbb27cf47ca9fb8bc354a8d3f7f9373c /arch/arm/plat-samsung/include
parente02ddd442a532c73e547ae3735c8012e3bd719a5 (diff)
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spi/s3c64xx: Consider the clk_from_cmu flag
Newer SoCs have the SPI clock scaling control in platform's clock management unit. Inorder for such SoCs to work, we need to check the flag clk_from_cmu before making any clock changes. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/arm/plat-samsung/include')
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c64xx-spi.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index e5aba8f..b226f740 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -32,6 +32,8 @@ struct s3c64xx_spi_csinfo {
* struct s3c64xx_spi_info - SPI Controller defining structure
* @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
* @src_clk_name: Platform name of the corresponding clock.
+ * @clk_from_cmu: If the SPI clock/prescalar control block is present
+ * by the platform's clock-management-unit and not in SPI controller.
* @num_cs: Number of CS this controller emulates.
* @cfg_gpio: Configure pins for this SPI controller.
* @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
@@ -41,6 +43,7 @@ struct s3c64xx_spi_csinfo {
struct s3c64xx_spi_info {
int src_clk_nr;
char *src_clk_name;
+ bool clk_from_cmu;
int num_cs;