Merge branch 'for-linus' of git://www.jni.nu/cris

* 'for-linus' of git://www.jni.nu/cris: (51 commits)
  CRIS: Fix alignment problem for older ld
  CRIS: Always dump registers for segfaulting process.
  CRIS: Add config for pausing a seg-faulting process
  CRIS: Don't take faults while in_atomic
  CRIS: Fixup lookup for delay slot faults
  CRIS: Discard exit.text and .data at runtime
  CRIS: Add cache aligned and read mostly data sections
  CRIS: Return something from profile write
  CRIS: Add ARTPEC-3 and timestamps for sync-serial
  CRIS: Better ARTPEC-3 support for gpio
  CRIS: Add include guard
  CRIS: Better handling of pinmux settings
  CRIS: New DMA defines for ARTPEC-3
  CRIS: __do_strncpy_from_user: Don't read the byte beyond the nil
  CRIS: Pagetable for ARTPEC-3
  CRIS: Machine dependent memmap.h
  CRIS: Check if pointer is set before using it
  CRIS: Machine dependent dma.h
  CRIS: Define __read_mostly for CRISv32
  CRIS: Discard .note.gnu.build-id section
  ...

24 files changed, 377 insertions, 415 deletions

diff --git a/arch/cris/arch-v32/drivers/cryptocop.c b/arch/cris/arch-v32/drivers/cryptocop.c
index b70fb34..b07646a 100644
--- a/arch/cris/arch-v32/drivers/cryptocop.c
+++ b/arch/cris/arch-v32/drivers/cryptocop.c
@@ -11,7 +11,6 @@
 #include <linux/string.h>
 #include <linux/fs.h>
 #include <linux/mm.h>
-#include <linux/smp_lock.h>
 #include <linux/spinlock.h>
 #include <linux/stddef.h>
 
@@ -217,7 +216,7 @@ static int cryptocop_open(struct inode *, struct file *);
 
 static int cryptocop_release(struct inode *, struct file *);
 
-static int cryptocop_ioctl(struct inode *inode, struct file *file,
+static long cryptocop_ioctl(struct file *file,
 			   unsigned int cmd, unsigned long arg);
 
 static void cryptocop_start_job(void);
@@ -279,10 +278,10 @@ static void print_user_dma_lists(struct cryptocop_dma_list_operation *dma_op);
 
 
 const struct file_operations cryptocop_fops = {
-	.owner =	THIS_MODULE,
-	.open =		cryptocop_open,
-	.release =	cryptocop_release,
-	.ioctl =	cryptocop_ioctl
+	.owner		= THIS_MODULE,
+	.open		= cryptocop_open,
+	.release	= cryptocop_release,
+	.unlocked_ioctl = cryptocop_ioctl
 };
 
 
@@ -2307,7 +2306,6 @@ static int cryptocop_open(struct inode *inode, struct file *filp)
 {
 	int p = iminor(inode);
 
-	cycle_kernel_lock();
 	if (p != CRYPTOCOP_MINOR) return -EINVAL;
 
 	filp->private_data = NULL;
@@ -3102,7 +3100,8 @@ static int cryptocop_ioctl_create_session(struct inode *inode, struct file *filp
 	return 0;
 }
 
-static int cryptocop_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
+static long cryptocop_ioctl_unlocked(struct inode *inode,
+	struct file *filp, unsigned int cmd, unsigned long arg)
 {
 	int err = 0;
 	if (_IOC_TYPE(cmd) != ETRAXCRYPTOCOP_IOCTYPE) {
@@ -3134,6 +3133,19 @@ static int cryptocop_ioctl(struct inode *inode, struct file *filp, unsigned int
 	return 0;
 }
 
+static long
+cryptocop_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+       struct inode *inode = file->f_path.dentry->d_inode;
+       long ret;
+
+       lock_kernel();
+       ret = cryptocop_ioctl_unlocked(inode, filp, cmd, arg);
+       unlock_kernel();
+
+       return ret;
+}
+
 
 #ifdef LDEBUG
 static void print_dma_descriptors(struct cryptocop_int_operation *iop)
diff --git a/arch/cris/arch-v32/drivers/i2c.c b/arch/cris/arch-v32/drivers/i2c.c
index 2fd6a74..5a3e900 100644
--- a/arch/cris/arch-v32/drivers/i2c.c
+++ b/arch/cris/arch-v32/drivers/i2c.c
@@ -32,7 +32,7 @@
 #include <linux/fs.h>
 #include <linux/string.h>
 #include <linux/init.h>
-#include <linux/smp_lock.h>
+#include <linux/mutex.h>
 
 #include <asm/etraxi2c.h>
 
@@ -47,6 +47,7 @@
 #define D(x)
 
 #define I2C_MAJOR 123  /* LOCAL/EXPERIMENTAL */
+static DEFINE_MUTEX(i2c_mutex);
 static const char i2c_name[] = "i2c";
 
 #define CLOCK_LOW_TIME            8
@@ -636,7 +637,6 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
 static int
 i2c_open(struct inode *inode, struct file *filp)
 {
-	cycle_kernel_lock();
 	return 0;
 }
 
@@ -665,11 +665,11 @@ i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 				 I2C_ARGREG(arg),
 				 I2C_ARGVALUE(arg)));
 
-			lock_kernel();
+			mutex_lock(&i2c_mutex);
 			ret = i2c_writereg(I2C_ARGSLAVE(arg),
 					    I2C_ARGREG(arg),
 					    I2C_ARGVALUE(arg));
-			unlock_kernel();
+			mutex_unlock(&i2c_mutex);
 			return ret;
 
 		case I2C_READREG:
@@ -679,9 +679,9 @@ i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 			D(printk("i2cr %d %d ",
 				I2C_ARGSLAVE(arg),
 				I2C_ARGREG(arg)));
-			lock_kernel();
+			mutex_lock(&i2c_mutex);
 			val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
-			unlock_kernel();
+			mutex_unlock(&i2c_mutex);
 			D(printk("= %d\n", val));
 			return val;
 		}
diff --git a/arch/cris/arch-v32/drivers/mach-a3/gpio.c b/arch/cris/arch-v32/drivers/mach-a3/gpio.c
index 97357cf..2dcd27a 100644
--- a/arch/cris/arch-v32/drivers/mach-a3/gpio.c
+++ b/arch/cris/arch-v32/drivers/mach-a3/gpio.c
@@ -72,8 +72,7 @@ static char gpio_name[] = "etrax gpio";
 static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
 			      unsigned long arg);
 #endif
-static int gpio_ioctl(struct inode *inode, struct file *file,
-	unsigned int cmd, unsigned long arg);
+static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
 static ssize_t gpio_write(struct file *file, const char __user *buf,
 	size_t count, loff_t *off);
 static int gpio_open(struct inode *inode, struct file *filp);
@@ -521,7 +520,7 @@ static inline unsigned long setget_output(struct gpio_private *priv,
 	return dir_shadow;
 } /* setget_output */
 
-static int gpio_ioctl(struct inode *inode, struct file *file,
+static long gpio_ioctl_unlocked(struct file *file,
 	unsigned int cmd, unsigned long arg)
 {
 	unsigned long flags;
@@ -664,6 +663,17 @@ static int gpio_ioctl(struct inode *inode, struct file *file,
 	return 0;
 }
 
+static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+       long ret;
+
+       lock_kernel();
+       ret = gpio_ioctl_unlocked(file, cmd, arg);
+       unlock_kernel();
+
+       return ret;
+}
+
 #ifdef CONFIG_ETRAX_VIRTUAL_GPIO
 static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
 	unsigned long arg)
@@ -877,12 +887,12 @@ static int gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd,
 }
 
 static const struct file_operations gpio_fops = {
-	.owner       = THIS_MODULE,
-	.poll        = gpio_poll,
-	.ioctl       = gpio_ioctl,
-	.write       = gpio_write,
-	.open        = gpio_open,
-	.release     = gpio_release,
+	.owner		= THIS_MODULE,
+	.poll		= gpio_poll,
+	.unlocked_ioctl	= gpio_ioctl,
+	.write		= gpio_write,
+	.open		= gpio_open,
+	.release	= gpio_release,
 };
 
 #ifdef CONFIG_ETRAX_VIRTUAL_GPIO
diff --git a/arch/cris/arch-v32/drivers/mach-fs/gpio.c b/arch/cris/arch-v32/drivers/mach-fs/gpio.c
index d89ab80..5ec8a7d 100644
--- a/arch/cris/arch-v32/drivers/mach-fs/gpio.c
+++ b/arch/cris/arch-v32/drivers/mach-fs/gpio.c
@@ -74,8 +74,7 @@ static wait_queue_head_t *gpio_wq;
 static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
 	unsigned long arg);
 #endif
-static int gpio_ioctl(struct inode *inode, struct file *file,
-	unsigned int cmd, unsigned long arg);
+static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
 static ssize_t gpio_write(struct file *file, const char *buf, size_t count,
 	loff_t *off);
 static int gpio_open(struct inode *inode, struct file *filp);
@@ -185,7 +184,7 @@ static volatile unsigned long *dir_oe[NUM_PORTS] = {
 static unsigned int gpio_poll(struct file *file, struct poll_table_struct *wait)
 {
 	unsigned int mask = 0;
-	struct gpio_private *priv = (struct gpio_private *)file->private_data;
+	struct gpio_private *priv = file->private_data;
 	unsigned long data;
 	poll_wait(file, &priv->alarm_wq, wait);
 	if (priv->minor == GPIO_MINOR_A) {
@@ -353,7 +352,7 @@ gpio_pa_interrupt(int irq, void *dev_id)
 static ssize_t gpio_write(struct file *file, const char *buf, size_t count,
 	loff_t *off)
 {
-	struct gpio_private *priv = (struct gpio_private *)file->private_data;
+	struct gpio_private *priv = file->private_data;
 	unsigned char data, clk_mask, data_mask, write_msb;
 	unsigned long flags;
 	unsigned long shadow;
@@ -468,7 +467,7 @@ gpio_release(struct inode *inode, struct file *filp)
 
 	spin_lock_irq(&alarm_lock);
 	p = alarmlist;
-	todel = (struct gpio_private *)filp->private_data;
+	todel = filp->private_data;
 
 	if (p == todel) {
 		alarmlist = todel->next;
@@ -557,17 +556,15 @@ inline unsigned long setget_output(struct gpio_private *priv, unsigned long arg)
 	return dir_shadow;
 } /* setget_output */
 
-static int
-gpio_leds_ioctl(unsigned int cmd, unsigned long arg);
+static int gpio_leds_ioctl(unsigned int cmd, unsigned long arg);
 
 static int
-gpio_ioctl(struct inode *inode, struct file *file,
-	   unsigned int cmd, unsigned long arg)
+gpio_ioctl_unlocked(struct file *file, unsigned int cmd, unsigned long arg)
 {
 	unsigned long flags;
 	unsigned long val;
 	unsigned long shadow;
-	struct gpio_private *priv = (struct gpio_private *)file->private_data;
+	struct gpio_private *priv = file->private_data;
 	if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE)
 		return -EINVAL;
 
@@ -707,6 +704,17 @@ gpio_ioctl(struct inode *inode, struct file *file,
 	return 0;
 }
 
+static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+       long ret;
+
+       lock_kernel();
+       ret = gpio_ioctl_unlocked(file, cmd, arg);
+       unlock_kernel();
+
+       return ret;
+}
+
 #ifdef CONFIG_ETRAX_VIRTUAL_GPIO
 static int
 virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
@@ -714,7 +722,7 @@ virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 	unsigned long flags;
 	unsigned short val;
 	unsigned short shadow;
-	struct gpio_private *priv = (struct gpio_private *)file->private_data;
+	struct gpio_private *priv = file->private_data;
 
 	switch (_IOC_NR(cmd)) {
 	case IO_SETBITS:
@@ -856,12 +864,12 @@ gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
 }
 
 static const struct file_operations gpio_fops = {
-	.owner       = THIS_MODULE,
-	.poll        = gpio_poll,
-	.ioctl       = gpio_ioctl,
-	.write       = gpio_write,
-	.open        = gpio_open,
-	.release     = gpio_release,
+	.owner		= THIS_MODULE,
+	.poll		= gpio_poll,
+	.unlocked_ioctl	= gpio_ioctl,
+	.write		= gpio_write,
+	.open		= gpio_open,
+	.release	= gpio_release,
 };
 
 #ifdef CONFIG_ETRAX_VIRTUAL_GPIO
diff --git a/arch/cris/arch-v32/drivers/sync_serial.c b/arch/cris/arch-v32/drivers/sync_serial.c
index 4889f19..ca248f3 100644
--- a/arch/cris/arch-v32/drivers/sync_serial.c
+++ b/arch/cris/arch-v32/drivers/sync_serial.c
@@ -153,7 +153,7 @@ static int sync_serial_open(struct inode *, struct file*);
 static int sync_serial_release(struct inode*, struct file*);
 static unsigned int sync_serial_poll(struct file *filp, poll_table *wait);
 
-static int sync_serial_ioctl(struct inode*, struct file*,
+static int sync_serial_ioctl(struct file *,
 			     unsigned int cmd, unsigned long arg);
 static ssize_t sync_serial_write(struct file * file, const char * buf,
 				 size_t count, loff_t *ppos);
@@ -241,13 +241,13 @@ static struct sync_port ports[]=
 #define NBR_PORTS ARRAY_SIZE(ports)
 
 static const struct file_operations sync_serial_fops = {
-	.owner   = THIS_MODULE,
-	.write   = sync_serial_write,
-	.read    = sync_serial_read,
-	.poll    = sync_serial_poll,
-	.ioctl   = sync_serial_ioctl,
-	.open    = sync_serial_open,
-	.release = sync_serial_release
+	.owner		= THIS_MODULE,
+	.write		= sync_serial_write,
+	.read		= sync_serial_read,
+	.poll		= sync_serial_poll,
+	.unlocked_ioctl	= sync_serial_ioctl,
+	.open		= sync_serial_open,
+	.release	= sync_serial_release
 };
 
 static int __init etrax_sync_serial_init(void)
@@ -650,7 +650,7 @@ static unsigned int sync_serial_poll(struct file *file, poll_table *wait)
 	return mask;
 }
 
-static int sync_serial_ioctl(struct inode *inode, struct file *file,
+static int sync_serial_ioctl(struct file *file,
 		  unsigned int cmd, unsigned long arg)
 {
 	int return_val = 0;
@@ -961,6 +961,18 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
 	return return_val;
 }
 
+static long sync_serial_ioctl(struct file *file,
+                             unsigned int cmd, unsigned long arg)
+{
+       long ret;
+
+       lock_kernel();
+       ret = sync_serial_ioctl_unlocked(file, cmd, arg);
+       unlock_kernel();
+
+       return ret;
+}
+
 /* NOTE: sync_serial_write does not support concurrency */
 static ssize_t sync_serial_write(struct file *file, const char *buf,
 				 size_t count, loff_t *ppos)
diff --git a/arch/cris/arch-v32/kernel/cacheflush.S b/arch/cris/arch-v32/kernel/cacheflush.S
index 956e8fb..6fc3d95 100644
--- a/arch/cris/arch-v32/kernel/cacheflush.S
+++ b/arch/cris/arch-v32/kernel/cacheflush.S
@@ -1,4 +1,5 @@
 	.global cris_flush_cache_range
+	.type	cris_flush_cache_range, @function
 cris_flush_cache_range:
 	move.d 1024, $r12
 	cmp.d $r11, $r12
@@ -80,8 +81,10 @@ cris_flush_1KB:
 	addq 32, $r10
 	ba cris_flush_cache_range
 	sub.d $r12, $r11
+	.size	cris_flush_cache_range, . - cris_flush_cache_range
 
 	.global cris_flush_cache
+	.type	cris_flush_cache, @function
 cris_flush_cache:
 	moveq 0, $r10
 cris_flush_line:
@@ -92,3 +95,5 @@ cris_flush_line:
 	fidxd [$r10]
 	ret
 	nop
+	.size	cris_flush_cache, . - cris_flush_cache
+
diff --git a/arch/cris/arch-v32/kernel/entry.S b/arch/cris/arch-v32/kernel/entry.S
index 1f39861..0ecb50b 100644
--- a/arch/cris/arch-v32/kernel/entry.S
+++ b/arch/cris/arch-v32/kernel/entry.S
@@ -76,12 +76,15 @@ _need_resched:
 
 	; Called at exit from fork. schedule_tail must be called to drop
 	; spinlock if CONFIG_PREEMPT.
+	.type	ret_from_fork,@function
 ret_from_fork:
 	jsr schedule_tail
 	nop
 	ba  ret_from_sys_call
 	nop
+	.size	ret_from_fork, . - ret_from_fork
 
+	.type	ret_from_intr,@function
 ret_from_intr:
 	;; Check for resched if preemptive kernel, or if we're going back to
 	;; user-mode. This test matches the user_regs(regs) macro. Don't simply
@@ -91,9 +94,10 @@ ret_from_intr:
 	move.d	[$acr], $r0
 	btstq	16, $r0			; User-mode flag.
 	bpl	_resume_kernel
+	.size	ret_from_intr, . - ret_from_intr + 2	; +2 includes the dslot.
 
 	; Note that di below is in delay slot.
-
+	.type	_resume_userspace,@function
 _resume_userspace:
 	di			; So need_resched and sigpending don't change.
 
@@ -107,6 +111,7 @@ _resume_userspace:
 	nop
 	ba	_Rexit
 	nop
+	.size	_resume_userspace, . - _resume_userspace
 
 	;; The system_call is called by a BREAK instruction, which looks pretty
 	;; much like any other exception.
@@ -122,30 +127,28 @@ _resume_userspace:
 	;; non-used instructions. Only the non-common cases cause the outlined code
 	;; to run..
 
+	.type	system_call,@function
 system_call:
 	;; Stack-frame similar to the irq heads, which is reversed in
 	;; ret_from_sys_call.
-	subq	12, $sp		; Skip EXS, EDA.
-	move	$erp, [$sp]
-	subq	4, $sp
-	move	$srp, [$sp]
-	subq	4, $sp
-	move	$ccs, [$sp]
-	subq	4, $sp
-	ei			; Allow IRQs while handling system call
-	move	$spc, [$sp]
-	subq	4, $sp
-	move	$mof, [$sp]
-	subq	4, $sp
-	move	$srs, [$sp]
-	subq	4, $sp
-	move.d	$acr, [$sp]
-	subq	14*4, $sp	; Make room for R0-R13.
-	movem	$r13, [$sp]	; Push R0-R13
-	subq	4, $sp
-	move.d	$r10, [$sp]	; Push orig_r10.
 
-; Set S-bit when kernel debugging to keep hardware breakpoints active.
+	sub.d	92, $sp		; Skip EXS and EDA.
+	movem	$r13, [$sp]
+	move.d	$sp, $r8
+	addq	14*4, $r8
+	move.d	$acr, $r0
+	move	$srs, $r1
+	move	$mof, $r2
+	move	$spc, $r3
+	move	$ccs, $r4
+	move	$srp, $r5
+	move	$erp, $r6
+	subq	4, $sp
+	movem	$r6, [$r8]
+	ei			; Enable interrupts while processing syscalls.
+	move.d	$r10, [$sp]
+
+	; Set S-bit when kernel debugging to keep hardware breakpoints active.
 #ifdef CONFIG_ETRAX_KGDB
 	move $ccs, $r0
 	or.d (1<<9), $r0
@@ -217,7 +220,9 @@ ret_from_sys_call:
 	and.d	_TIF_ALLWORK_MASK, $r1
 	bne	_syscall_exit_work
 	nop
+	.size	system_call, . - system_call
 
+	.type	_Rexit,@function
 _Rexit:
 	;; This epilogue MUST match the prologues in multiple_interrupt, irq.h
 	;; and ptregs.h.
@@ -234,10 +239,12 @@ _Rexit:
 	addq    8, $sp		; Skip EXS, EDA.
 	jump	$erp
 	rfe			; Restore condition code stack in delay-slot.
+	.size	_Rexit, . - _Rexit
 
 	;; We get here after doing a syscall if extra work might need to be done
 	;; perform syscall exit tracing if needed.
 
+	.type	_syscall_exit_work,@function
 _syscall_exit_work:
 	;; R0 contains current at this point and irq's are disabled.
 
@@ -253,14 +260,18 @@ _syscall_exit_work:
 	move.d	$r1, $r9
 	ba	_resume_userspace
 	nop
+	.size	_syscall_exit_work, . - _syscall_exit_work
 
+	.type	_work_pending,@function
 _work_pending:
 	addoq	+TI_flags, $r0, $acr
 	move.d	[$acr], $r10
 	btstq	TIF_NEED_RESCHED, $r10	; Need resched?
 	bpl	_work_notifysig		; No, must be signal/notify.
 	nop
+	.size	_work_pending, . - _work_pending
 
+	.type	_work_resched,@function
 _work_resched:
 	move.d	$r9, $r1		; Preserve R9.
 	jsr	schedule
@@ -276,7 +287,9 @@ _work_resched:
 	btstq	TIF_NEED_RESCHED, $r1
 	bmi	_work_resched		; current->work.need_resched.
 	nop
+	.size	_work_resched, . - _work_resched
 
+	.type	_work_notifysig,@function
 _work_notifysig:
 	;; Deal with pending signals and notify-resume requests.
 
@@ -288,6 +301,7 @@ _work_notifysig:
 
 	ba _Rexit
 	nop
+	.size	_work_notifysig, . - _work_notifysig
 
 	;; We get here as a sidetrack when we've entered a syscall with the
 	;; trace-bit set. We need to call do_syscall_trace and then continue
@@ -329,41 +343,43 @@ _syscall_trace_entry:
 	;;
 	;; Returns old current in R10.
 
+	.type	resume,@function
 resume:
-	subq	4, $sp
-	move	$srp, [$sp]		; Keep old/new PC on the stack.
+	subq	4, $sp			; Make space for srp.
+
 	add.d	$r12, $r10		; R10 = current tasks tss.
 	addoq	+THREAD_ccs, $r10, $acr
+	move	$srp, [$sp]		; Keep old/new PC on the stack.
 	move	$ccs, [$acr]		; Save IRQ enable state.
 	di
 
 	addoq	+THREAD_usp, $r10, $acr
+	subq	10*4, $sp		; Make room for R9.
 	move	$usp, [$acr]		; Save user-mode stackpointer.
 
 	;; See copy_thread for the reason why register R9 is saved.
-	subq	10*4, $sp
 	movem	$r9, [$sp]		; Save non-scratch registers and R9.
 
 	addoq	+THREAD_ksp, $r10, $acr
+	move.d	$sp, $r10		; Return last running task in R10.
 	move.d	$sp, [$acr]		; Save kernel SP for old task.
 
-	move.d	$sp, $r10		; Return last running task in R10.
 	and.d   -8192, $r10		; Get thread_info from stackpointer.
 	addoq	+TI_task, $r10, $acr
-	move.d	[$acr], $r10		; Get task.
 	add.d	$r12, $r11		; Find the new tasks tss.
+	move.d	[$acr], $r10		; Get task.
 	addoq	+THREAD_ksp, $r11, $acr
 	move.d	[$acr], $sp		; Switch to new stackframe.
+	addoq	+THREAD_usp, $r11, $acr
 	movem	[$sp+], $r9		; Restore non-scratch registers and R9.
 
-	addoq	+THREAD_usp, $r11, $acr
 	move	[$acr], $usp		; Restore user-mode stackpointer.
 
 	addoq	+THREAD_ccs, $r11, $acr
+	move.d	[$sp+], $r11
+	jump	$r11			; Restore PC.
 	move	[$acr], $ccs		; Restore IRQ enable status.
-	move.d	[$sp+], $acr
-	jump	$acr			; Restore PC.
-	nop
+	.size	resume, . - resume
 
 nmi_interrupt:
 
@@ -426,6 +442,7 @@ spurious_interrupt:
 	;; time. Jump to the first set interrupt bit in a priotiry fashion. The
 	;; hardware will call the unserved interrupts after the handler
 	;; finishes.
+	.type	multiple_interrupt, @function
 multiple_interrupt:
 	;; This prologue MUST match the one in irq.h and the struct in ptregs.h!
 	subq	12, $sp		; Skip EXS, EDA.
@@ -458,6 +475,7 @@ multiple_interrupt:
 	move.d	$sp, $r10
 	jump    ret_from_intr
 	nop
+	.size	multiple_interrupt, . - multiple_interrupt
 
 do_sigtrap:
 	;; Sigtraps the process that executed the BREAK instruction. Creates a
@@ -514,11 +532,13 @@ _ugdb_handle_exception:
 	move.d	[$sp+], $r0		; Restore R0 in delay slot.
 
 	.global kernel_execve
+	.type	kernel_execve,@function
 kernel_execve:
 	move.d __NR_execve, $r9
 	break 13
 	ret
 	nop
+	.size	kernel_execve, . - kernel_execve
 
 	.data
 
diff --git a/arch/cris/arch-v32/kernel/head.S b/arch/cris/arch-v32/kernel/head.S
index 76266f8..5d502b9 100644
--- a/arch/cris/arch-v32/kernel/head.S
+++ b/arch/cris/arch-v32/kernel/head.S
@@ -69,7 +69,13 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
 	;;
 	;; Note; 3 cycles is needed for a bank-select to take effect. Further;
 	;; bank 1 is the instruction MMU, bank 2 is the data MMU.
-#ifndef CONFIG_ETRAX_VCS_SIM
+
+#ifdef CONFIG_CRIS_MACH_ARTPEC3
+	move.d	REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8)	\
+		| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4)	\
+		| REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5)     \
+		| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
+#elif !defined(CONFIG_ETRAX_VCS_SIM)
 	move.d	REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8)	\
 		| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4)	\
 		| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
@@ -88,7 +94,39 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
 
 	;; Enable certain page protections and setup linear mapping
 	;; for f,e,c,b,4,0.
-#ifndef CONFIG_ETRAX_VCS_SIM
+
+	;; ARTPEC-3:
+	;; c,d used for linear kernel mapping, up to 512 MB
+	;; e used for vmalloc
+	;; f unused, but page mapped to get page faults
+
+	;; ETRAX FS:
+	;; c used for linear kernel mapping, up to 256 MB
+	;; d used for vmalloc
+	;; e,f used for memory-mapped NOR flash
+
+#ifdef CONFIG_CRIS_MACH_ARTPEC3
+	move.d	REG_STATE(mmu, rw_mm_cfg, we, on)		\
+		| REG_STATE(mmu, rw_mm_cfg, acc, on)		\
+		| REG_STATE(mmu, rw_mm_cfg, ex, on)		\
+		| REG_STATE(mmu, rw_mm_cfg, inv, on)            \
+		| REG_STATE(mmu, rw_mm_cfg, seg_f, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_e, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_d, linear)      \
+		| REG_STATE(mmu, rw_mm_cfg, seg_c, linear)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_b, linear)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_a, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_9, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_8, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_7, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_6, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_5, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_4, linear)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_3, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_2, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_1, page)	\
+		| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
+#elif !defined(CONFIG_ETRAX_VCS_SIM)
 	move.d	REG_STATE(mmu, rw_mm_cfg, we, on)		\
 		| REG_STATE(mmu, rw_mm_cfg, acc, on)		\
 		| REG_STATE(mmu, rw_mm_cfg, ex, on)		\
@@ -329,7 +367,7 @@ _no_romfs_in_flash:
 	;; For jffs2, a jhead is prepended which contains with magic and length.
 	;; The jhead is not part of the jffs2 partition however.
 #ifndef CONFIG_ETRAXFS_SIM
-	move.d	__vmlinux_end, $r0
+	move.d	__bss_start, $r0
 #else
 	move.d	__end, $r0
 #endif
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
index 0b1febe..2ed48ae3d 100644
--- a/arch/cris/arch-v32/kernel/irq.c
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -97,7 +97,11 @@ extern void breakh_BUG(void);
 /*
  * Build the IRQ handler stubs using macros from irq.h.
  */
+#ifdef CONFIG_CRIS_MACH_ARTPEC3
+BUILD_TIMER_IRQ(0x31, 0)
+#else
 BUILD_IRQ(0x31)
+#endif
 BUILD_IRQ(0x32)
 BUILD_IRQ(0x33)
 BUILD_IRQ(0x34)
@@ -123,7 +127,11 @@ BUILD_IRQ(0x47)
 BUILD_IRQ(0x48)
 BUILD_IRQ(0x49)
 BUILD_IRQ(0x4a)
+#ifdef CONFIG_ETRAXFS
+BUILD_TIMER_IRQ(0x4b, 0)
+#else
 BUILD_IRQ(0x4b)
+#endif
 BUILD_IRQ(0x4c)
 BUILD_IRQ(0x4d)
 BUILD_IRQ(0x4e)
@@ -199,25 +207,20 @@ block_irq(int irq, int cpu)
         unsigned long flags;
 
 	spin_lock_irqsave(&irq_lock, flags);
-	if (irq - FIRST_IRQ < 32)
+	/* Remember, 1 let thru, 0 block. */
+	if (irq - FIRST_IRQ < 32) {
 		intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
 			rw_mask, 0);
-	else
-		intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
-			rw_mask, 1);
-
-	/* Remember; 1 let thru, 0 block. */
-	if (irq - FIRST_IRQ < 32)
 		intr_mask &= ~(1 << (irq - FIRST_IRQ));
-	else
-		intr_mask &= ~(1 << (irq - FIRST_IRQ - 32));
-
-	if (irq - FIRST_IRQ < 32)
 		REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
 			0, intr_mask);
-	else
+	} else {
+		intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
+			rw_mask, 1);
+		intr_mask &= ~(1 << (irq - FIRST_IRQ - 32));
 		REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
 			1, intr_mask);
+	}
         spin_unlock_irqrestore(&irq_lock, flags);
 }
 
@@ -228,26 +231,20 @@ unblock_irq(int irq, int cpu)
         unsigned long flags;
 
         spin_lock_irqsave(&irq_lock, flags);
-	if (irq - FIRST_IRQ < 32)
+	/* Remember, 1 let thru, 0 block. */
+	if (irq - FIRST_IRQ < 32) {
 		intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
 			rw_mask, 0);
-	else
-		intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
-			rw_mask, 1);
-
-	/* Remember; 1 let thru, 0 block. */
-	if (irq - FIRST_IRQ < 32)
 		intr_mask |= (1 << (irq - FIRST_IRQ));
-	else
-		intr_mask |= (1 << (irq - FIRST_IRQ - 32));
-
-	if (irq - FIRST_IRQ < 32)
 		REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
 			0, intr_mask);
-	else
+	} else {
+		intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
+			rw_mask, 1);
+		intr_mask |= (1 << (irq - FIRST_IRQ - 32));
 		REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
 			1, intr_mask);
-
+	}
         spin_unlock_irqrestore(&irq_lock, flags);
 }
 
diff --git a/arch/cris/arch-v32/kernel/kgdb.c b/arch/cris/arch-v32/kernel/kgdb.c
index c981fd6..6b65332 100644
--- a/arch/cris/arch-v32/kernel/kgdb.c
+++ b/arch/cris/arch-v32/kernel/kgdb.c
@@ -174,10 +174,10 @@
 #include <asm/ptrace.h>
 
 #include <asm/irq.h>
-#include <arch/hwregs/reg_map.h>
-#include <arch/hwregs/reg_rdwr.h>
-#include <arch/hwregs/intr_vect_defs.h>
-#include <arch/hwregs/ser_defs.h>
+#include <hwregs/reg_map.h>
+#include <hwregs/reg_rdwr.h>
+#include <hwregs/intr_vect_defs.h>
+#include <hwregs/ser_defs.h>
 
 /* From entry.S. */
 extern void gdb_handle_exception(void);
@@ -988,26 +988,26 @@ stub_is_stopped(int sigval)
 	}
 	/* Only send PC, frame and stack pointer. */
 	read_register(PC, &reg_cont);
-	ptr = pack_hex_byte(PC);
+	ptr = pack_hex_byte(ptr, PC);
 	*ptr++ = ':';
 	ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[PC]);
 	*ptr++ = ';';
 
 	read_register(R8, &reg_cont);
-	ptr = pack_hex_byte(R8);
+	ptr = pack_hex_byte(ptr, R8);
 	*ptr++ = ':';
 	ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[R8]);
 	*ptr++ = ';';
 
 	read_register(SP, &reg_cont);
-	ptr = pack_hex_byte(SP);
+	ptr = pack_hex_byte(ptr, SP);
 	*ptr++ = ':';
 	ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[SP]);
 	*ptr++ = ';';
 
 	/* Send ERP as well; this will save us an entire register fetch in some cases. */
         read_register(ERP, &reg_cont);
-	ptr = pack_hex_byte(ERP);
+	ptr = pack_hex_byte(ptr, ERP);
         *ptr++ = ':';
         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[ERP]);
         *ptr++ = ';';
diff --git a/arch/cris/arch-v32/kernel/kgdb_asm.S b/arch/cris/arch-v32/kernel/kgdb_asm.S
index eba93e7..f3a4760 100644
--- a/arch/cris/arch-v32/kernel/kgdb_asm.S
+++ b/arch/cris/arch-v32/kernel/kgdb_asm.S
@@ -5,7 +5,7 @@
  * port exceptions for kernel debugging purposes.
  */
 
-#include <arch/hwregs/intr_vect.h>
+#include <hwregs/intr_vect.h>
 
 	;; Exported functions.
 	.globl kgdb_handle_exception
diff --git a/arch/cris/arch-v32/kernel/pinmux.c b/arch/cris/arch-v32/kernel/pinmux.c
deleted file mode 100644
index f6f3637..0000000
--- a/arch/cris/arch-v32/kernel/pinmux.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * Allocator for I/O pins. All pins are allocated to GPIO at bootup.
- * Unassigned pins and GPIO pins can be allocated to a fixed interface
- * or the I/O processor instead.
- *
- * Copyright (c) 2004 Axis Communications AB.
- */
-
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/spinlock.h>
-#include <arch/hwregs/reg_map.h>
-#include <arch/hwregs/reg_rdwr.h>
-#include <arch/pinmux.h>
-#include <arch/hwregs/pinmux_defs.h>
-
-#undef DEBUG
-
-#define PORT_PINS 18
-#define PORTS 4
-
-static char pins[PORTS][PORT_PINS];
-static DEFINE_SPINLOCK(pinmux_lock);
-
-static void crisv32_pinmux_set(int port);
-
-int
-crisv32_pinmux_init(void)
-{
-	static int initialized = 0;
-
-	if (!initialized) {
-		reg_pinmux_rw_pa pa = REG_RD(pinmux, regi_pinmux, rw_pa);
-		initialized = 1;
-		pa.pa0 = pa.pa1 = pa.pa2 = pa.pa3 =
-		pa.pa4 = pa.pa5 = pa.pa6 = pa.pa7 = regk_pinmux_yes;
-		REG_WR(pinmux, regi_pinmux, rw_pa, pa);
-		crisv32_pinmux_alloc(PORT_B, 0, PORT_PINS - 1, pinmux_gpio);
-		crisv32_pinmux_alloc(PORT_C, 0, PORT_PINS - 1, pinmux_gpio);
-		crisv32_pinmux_alloc(PORT_D, 0, PORT_PINS - 1, pinmux_gpio);
-		crisv32_pinmux_alloc(PORT_E, 0, PORT_PINS - 1, pinmux_gpio);
-	}
-
-	return 0;
-}
-
-int
-crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
-{
-	int i;
-	unsigned long flags;
-
-	crisv32_pinmux_init();
-
-	if (port > PORTS || port < 0)
-		return -EINVAL;
-
-	spin_lock_irqsave(&pinmux_lock, flags);
-
-	for (i = first_pin; i <= last_pin; i++)
-	{
-		if ((pins[port][i] != pinmux_none) && (pins[port][i] != pinmux_gpio) &&
-		    (pins[port][i] != mode))
-		{
-			spin_unlock_irqrestore(&pinmux_lock, flags);
-#ifdef DEBUG
-			panic("Pinmux alloc failed!\n");
-#endif
-			return -EPERM;
-		}
-	}
-
-	for (i = first_pin; i <= last_pin; i++)
-		pins[port][i] = mode;
-
-	crisv32_pinmux_set(port);
-
-	spin_unlock_irqrestore(&pinmux_lock, flags);
-
-	return 0;
-}
-
-int
-crisv32_pinmux_alloc_fixed(enum fixed_function function)
-{
-	int ret = -EINVAL;
-	char saved[sizeof pins];
-	unsigned long flags;
-
-	spin_lock_irqsave(&pinmux_lock, flags);
-
-	/* Save internal data for recovery */
-	memcpy(saved, pins, sizeof pins);
-
-	reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
-
-	switch(function)
-	{
-	case pinmux_ser1:
-		ret = crisv32_pinmux_alloc(PORT_C, 4, 7, pinmux_fixed);
-		hwprot.ser1 = regk_pinmux_yes;
-		break;
-	case pinmux_ser2:
-		ret = crisv32_pinmux_alloc(PORT_C, 8, 11, pinmux_fixed);
-		hwprot.ser2 = regk_pinmux_yes;
-		break;
-	case pinmux_ser3:
-		ret = crisv32_pinmux_alloc(PORT_C, 12, 15, pinmux_fixed);
-		hwprot.ser3 = regk_pinmux_yes;
-		break;
-	case pinmux_sser0:
-		ret = crisv32_pinmux_alloc(PORT_C, 0, 3, pinmux_fixed);
-		ret |= crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
-		hwprot.sser0 = regk_pinmux_yes;
-		break;
-	case pinmux_sser1:
-		ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
-		hwprot.sser1 = regk_pinmux_yes;
-		break;
-	case pinmux_ata0:
-		ret = crisv32_pinmux_alloc(PORT_D, 5, 7, pinmux_fixed);
-		ret |= crisv32_pinmux_alloc(PORT_D, 15, 17, pinmux_fixed);
-		hwprot.ata0 = regk_pinmux_yes;
-		break;
-	case pinmux_ata1:
-		ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
-		ret |= crisv32_pinmux_alloc(PORT_E, 17, 17, pinmux_fixed);
-		hwprot.ata1 = regk_pinmux_yes;
-		break;
-	case pinmux_ata2:
-		ret = crisv32_pinmux_alloc(PORT_C, 11, 15, pinmux_fixed);
-		ret |= crisv32_pinmux_alloc(PORT_E, 3, 3, pinmux_fixed);
-		hwprot.ata2 = regk_pinmux_yes;
-		break;
-	case pinmux_ata3:
-		ret = crisv32_pinmux_alloc(PORT_C, 8, 10, pinmux_fixed);
-		ret |= crisv32_pinmux_alloc(PORT_C, 0, 2, pinmux_fixed);
-		hwprot.ata2 = regk_pinmux_yes;
-		break;
-	case pinmux_ata:
-		ret = crisv32_pinmux_alloc(PORT_B, 0, 15, pinmux_fixed);
-		ret |= crisv32_pinmux_alloc(PORT_D, 8, 15, pinmux_fixed);
-		hwprot.ata = regk_pinmux_yes;
-		break;
-	case pinmux_eth1:
-		ret = crisv32_pinmux_alloc(PORT_E, 0, 17, pinmux_fixed);
-		hwprot.eth1 = regk_pinmux_yes;
-		hwprot.eth1_mgm = regk_pinmux_yes;
-		break;
-	case pinmux_timer:
-		ret = crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
-		hwprot.timer = regk_pinmux_yes;
-		spin_unlock_irqrestore(&pinmux_lock, flags);
-		return ret;
-	}
-
-	if (!ret)
-		REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
-	else
-		memcpy(pins, saved, sizeof pins);
-
-  spin_unlock_irqrestore(&pinmux_lock, flags);
-
-  return ret;
-}
-
-void
-crisv32_pinmux_set(int port)
-{
-	int i;
-	int gpio_val = 0;
-	int iop_val = 0;
-
-	for (i = 0; i < PORT_PINS; i++)
-	{
-		if (pins[port][i] == pinmux_gpio)
-			gpio_val |= (1 << i);
-		else if (pins[port][i] == pinmux_iop)
-			iop_val |= (1 << i);
-	}
-
-	REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_pb_gio + 8*port, gpio_val);
-	REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_pb_iop + 8*port, iop_val);
-
-#ifdef DEBUG
-       crisv32_pinmux_dump();
-#endif
-}
-
-int
-crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
-{
-	int i;
-	unsigned long flags;
-
-	crisv32_pinmux_init();
-
-	if (port > PORTS || port < 0)
-		return -EINVAL;
-
-	spin_lock_irqsave(&pinmux_lock, flags);
-
-	for (i = first_pin; i <= last_pin; i++)
-		pins[port][i] = pinmux_none;
-
-	crisv32_pinmux_set(port);
-	spin_unlock_irqrestore(&pinmux_lock, flags);
-
-	return 0;
-}
-
-void
-crisv32_pinmux_dump(void)
-{
-	int i, j;
-
-	crisv32_pinmux_init();
-
-	for (i = 0; i < PORTS; i++)
-	{
-		printk("Port %c\n", 'B'+i);
-		for (j = 0; j < PORT_PINS; j++)
-			printk("  Pin %d = %d\n", j, pins[i][j]);
-	}
-}
-
-__initcall(crisv32_pinmux_init);
diff --git a/arch/cris/arch-v32/kernel/setup.c b/arch/cris/arch-v32/kernel/setup.c
index 72e9e83..61e10ae 100644
--- a/arch/cris/arch-v32/kernel/setup.c
+++ b/arch/cris/arch-v32/kernel/setup.c
@@ -9,6 +9,9 @@
 #include <linux/delay.h>
 #include <linux/param.h>
 
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+
 #ifdef CONFIG_PROC_FS
 
 #define HAS_FPU         0x0001
@@ -43,14 +46,15 @@ static struct cpu_info cpinfo[] = {
 
 	{"ETRAX 100LX v2", 11, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB
 			        | HAS_MMU},
-
+#ifdef CONFIG_ETRAXFS
 	{"ETRAX FS", 32, 32, HAS_ETHERNET100 | HAS_ATA | HAS_MMU},
-
+#else
+	{"ARTPEC-3", 32, 32, HAS_ETHERNET100 | HAS_MMU},
+#endif
 	{"Unknown", 0, 0, 0}
 };
 
-int
-show_cpuinfo(struct seq_file *m, void *v)
+int show_cpuinfo(struct seq_file *m, void *v)
 {
 	int i;
 	int cpu = (int)v - 1;
@@ -107,9 +111,63 @@ show_cpuinfo(struct seq_file *m, void *v)
 
 #endif /* CONFIG_PROC_FS */
 
-void
-show_etrax_copyright(void)
+void show_etrax_copyright(void)
+{
+#ifdef CONFIG_ETRAXFS
+	printk(KERN_INFO "Linux/CRISv32 port on ETRAX FS "
+		"(C) 2003, 2004 Axis Communications AB\n");
+#else
+	printk(KERN_INFO "Linux/CRISv32 port on ARTPEC-3 "
+		"(C) 2003-2009 Axis Communications AB\n");
+#endif
+}
+
+static struct i2c_board_info __initdata i2c_info[] = {
+	{I2C_BOARD_INFO("camblock", 0x43)},
+	{I2C_BOARD_INFO("tmp100", 0x48)},
+	{I2C_BOARD_INFO("tmp100", 0x4A)},
+	{I2C_BOARD_INFO("tmp100", 0x4C)},
+	{I2C_BOARD_INFO("tmp100", 0x4D)},
+	{I2C_BOARD_INFO("tmp100", 0x4E)},
+#ifdef CONFIG_RTC_DRV_PCF8563
+	{I2C_BOARD_INFO("pcf8563", 0x51)},
+#endif
+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
+	{I2C_BOARD_INFO("vgpio", 0x20)},
+	{I2C_BOARD_INFO("vgpio", 0x21)},
+#endif
+	{I2C_BOARD_INFO("pca9536", 0x41)},
+	{I2C_BOARD_INFO("fnp300", 0x40)},
+	{I2C_BOARD_INFO("fnp300", 0x42)},
+	{I2C_BOARD_INFO("adc101", 0x54)},
+};
+
+static struct i2c_board_info __initdata i2c_info2[] = {
+	{I2C_BOARD_INFO("camblock", 0x43)},
+	{I2C_BOARD_INFO("tmp100", 0x48)},
+	{I2C_BOARD_INFO("tmp100", 0x4A)},
+	{I2C_BOARD_INFO("tmp100", 0x4C)},
+	{I2C_BOARD_INFO("tmp100", 0x4D)},
+	{I2C_BOARD_INFO("tmp100", 0x4E)},
+#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
+	{I2C_BOARD_INFO("vgpio", 0x20)},
+	{I2C_BOARD_INFO("vgpio", 0x21)},
+#endif
+	{I2C_BOARD_INFO("pca9536", 0x41)},
+	{I2C_BOARD_INFO("fnp300", 0x40)},
+	{I2C_BOARD_INFO("fnp300", 0x42)},
+	{I2C_BOARD_INFO("adc101", 0x54)},
+};
+
+static struct i2c_board_info __initdata i2c_info3[] = {
+	{I2C_BOARD_INFO("adc101", 0x54)},
+};
+
+static int __init etrax_init(void)
 {
-	printk(KERN_INFO
-               "Linux/CRISv32 port on ETRAX FS (C) 2003, 2004 Axis Communications AB\n");
+	i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
+	i2c_register_board_info(1, i2c_info2, ARRAY_SIZE(i2c_info2));
+	i2c_register_board_info(2, i2c_info3, ARRAY_SIZE(i2c_info3));
+	return 0;
 }
+arch_initcall(etrax_init);
diff --git a/arch/cris/arch-v32/kernel/signal.c b/arch/cris/arch-v32/kernel/signal.c
index 0b7e3f1..b3a05ae 100644
--- a/arch/cris/arch-v32/kernel/signal.c
+++ b/arch/cris/arch-v32/kernel/signal.c
@@ -587,7 +587,7 @@ do_signal(int canrestart, struct pt_regs *regs)
 		}
 
 		if (regs->r10 == -ERESTART_RESTARTBLOCK){
-			regs->r10 = __NR_restart_syscall;
+			regs->r9 = __NR_restart_syscall;
 			regs->erp -= 2;
 		}
 	}
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index 1ee0e10..a545211 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -1,13 +1,13 @@
 /*
  *  linux/arch/cris/arch-v32/kernel/time.c
  *
- *  Copyright (C) 2003-2007 Axis Communications AB
+ *  Copyright (C) 2003-2010 Axis Communications AB
  *
  */
 
 #include <linux/timex.h>
 #include <linux/time.h>
-#include <linux/jiffies.h>
+#include <linux/clocksource.h>
 #include <linux/interrupt.h>
 #include <linux/swap.h>
 #include <linux/sched.h>
@@ -36,6 +36,30 @@
 /* Number of 763 counts before watchdog bites */
 #define ETRAX_WD_CNT		((2*ETRAX_WD_HZ)/HZ + 1)
 
+/* Register the continuos readonly timer available in FS and ARTPEC-3.  */
+static cycle_t read_cont_rotime(struct clocksource *cs)
+{
+	return (u32)REG_RD(timer, regi_timer0, r_time);
+}
+
+static struct clocksource cont_rotime = {
+	.name   = "crisv32_rotime",
+	.rating = 300,
+	.read   = read_cont_rotime,
+	.mask   = CLOCKSOURCE_MASK(32),
+	.shift  = 10,
+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static int __init etrax_init_cont_rotime(void)
+{
+	cont_rotime.mult = clocksource_khz2mult(100000, cont_rotime.shift);
+	clocksource_register(&cont_rotime);
+	return 0;
+}
+arch_initcall(etrax_init_cont_rotime);
+
+
 unsigned long timer_regs[NR_CPUS] =
 {
 	regi_timer0,
@@ -67,43 +91,6 @@ unsigned long get_ns_in_jiffie(void)
 	return ns;
 }
 
-unsigned long do_slow_gettimeoffset(void)
-{
-	unsigned long count;
-	unsigned long usec_count = 0;
-
-	/* For the first call after boot */
-	static unsigned long count_p = TIMER0_DIV;
-	static unsigned long jiffies_p = 0;
-
-	/* Cache volatile jiffies temporarily; we have IRQs turned off. */
-	unsigned long jiffies_t;
-
-	/* The timer interrupt comes from Etrax timer 0. In order to get
-	 * better precision, we check the current value. It might have
-	 * underflowed already though. */
-	count = REG_RD(timer, regi_timer0, r_tmr0_data);
-	jiffies_t = jiffies;
-
-	/* Avoiding timer inconsistencies (they are rare, but they happen)
-	 * There is one problem that must be avoided here:
-	 *	1. the timer counter underflows
-	 */
-	if( jiffies_t == jiffies_p ) {
-		if( count > count_p ) {
-			/* Timer wrapped, use new count and prescale.
-			 * Increase the time corresponding to one jiffy.
-			 */
-			usec_count = 1000000/HZ;
-		}
-	} else
-		jiffies_p = jiffies_t;
-        count_p = count;
-	/* Convert timer value to usec */
-	/* 100 MHz timer, divide by 100 to get usec */
-	usec_count +=  (TIMER0_DIV - count) / 100;
-	return usec_count;
-}
 
 /* From timer MDS describing the hardware watchdog:
  * 4.3.1 Watchdog Operation
@@ -126,8 +113,7 @@ static short int watchdog_key = 42;  /* arbitrary 7 bit number */
  * is used though, so set this really low. */
 #define WATCHDOG_MIN_FREE_PAGES 8
 
-void
-reset_watchdog(void)
+void reset_watchdog(void)
 {
 #if defined(CONFIG_ETRAX_WATCHDOG)
 	reg_timer_rw_wd_ctrl wd_ctrl = { 0 };
@@ -147,8 +133,7 @@ reset_watchdog(void)
 
 /* stop the watchdog - we still need the correct key */
 
-void
-stop_watchdog(void)
+void stop_watchdog(void)
 {
 #if defined(CONFIG_ETRAX_WATCHDOG)
 	reg_timer_rw_wd_ctrl wd_ctrl = { 0 };
@@ -162,8 +147,7 @@ stop_watchdog(void)
 
 extern void show_registers(struct pt_regs *regs);
 
-void
-handle_watchdog_bite(struct pt_regs* regs)
+void handle_watchdog_bite(struct pt_regs *regs)
 {
 #if defined(CONFIG_ETRAX_WATCHDOG)
 	extern int cause_of_death;
@@ -203,8 +187,7 @@ handle_watchdog_bite(struct pt_regs* regs)
  */
 extern void cris_do_profile(struct pt_regs *regs);
 
-static inline irqreturn_t
-timer_interrupt(int irq, void *dev_id)
+static inline irqreturn_t timer_interrupt(int irq, void *dev_id)
 {
 	struct pt_regs *regs = get_irq_regs();
 	int cpu = smp_processor_id();
@@ -233,7 +216,9 @@ timer_interrupt(int irq, void *dev_id)
 		return IRQ_HANDLED;
 
 	/* Call the real timer interrupt handler */
+	write_seqlock(&xtime_lock);
 	do_timer(1);
+	write_sequnlock(&xtime_lock);
         return IRQ_HANDLED;
 }
 
@@ -246,8 +231,7 @@ static struct irqaction irq_timer = {
 	.name = "timer"
 };
 
-void __init
-cris_timer_init(void)
+void __init cris_timer_init(void)
 {
 	int cpu = smp_processor_id();
 	reg_timer_rw_tmr0_ctrl tmr0_ctrl = { 0 };
@@ -273,8 +257,7 @@ cris_timer_init(void)
 	REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask);
 }
 
-void __init
-time_init(void)
+void __init time_init(void)
 {
 	reg_intr_vect_rw_mask intr_mask;
 
diff --git a/arch/cris/arch-v32/kernel/traps.c b/arch/cris/arch-v32/kernel/traps.c
index 9003e38..8bbe09c 100644
--- a/arch/cris/arch-v32/kernel/traps.c
+++ b/arch/cris/arch-v32/kernel/traps.c
@@ -9,8 +9,7 @@
 #include <hwregs/intr_vect_defs.h>
 #include <asm/irq.h>
 
-void
-show_registers(struct pt_regs *regs)
+void show_registers(struct pt_regs *regs)
 {
 	/*
 	 * It's possible to use either the USP register or current->thread.usp.
@@ -101,8 +100,7 @@ bad_value:
 	}
 }
 
-void
-arch_enable_nmi(void)
+void arch_enable_nmi(void)
 {
 	unsigned long flags;
 
diff --git a/arch/cris/arch-v32/lib/checksum.S b/arch/cris/arch-v32/lib/checksum.S
index 87f3fd7..4a72a94 100644
--- a/arch/cris/arch-v32/lib/checksum.S
+++ b/arch/cris/arch-v32/lib/checksum.S
@@ -6,6 +6,7 @@
  */
 
 	.globl	csum_partial
+	.type   csum_partial,@function
 csum_partial:
 
 	;; r10 - src
@@ -83,3 +84,5 @@ _do_byte:
 	addu.b	[$r10],$r12
 	ret
 	move.d	$r12,$r10
+
+	.size   csum_partial, .-csum_partial
diff --git a/arch/cris/arch-v32/lib/checksumcopy.S b/arch/cris/arch-v32/lib/checksumcopy.S
index 21aabe9..54e209f 100644
--- a/arch/cris/arch-v32/lib/checksumcopy.S
+++ b/arch/cris/arch-v32/lib/checksumcopy.S
@@ -9,6 +9,7 @@
  */
 
 	.globl	csum_partial_copy_nocheck
+	.type   csum_partial_copy_nocheck,@function
 csum_partial_copy_nocheck:
 
 	;; r10 - src
@@ -89,3 +90,5 @@ _do_byte:
 	move.b	$r9,[$r11]
 	ret
 	move.d	$r13,$r10
+
+	.size   csum_partial_copy_nocheck, . - csum_partial_copy_nocheck
diff --git a/arch/cris/arch-v32/lib/spinlock.S b/arch/cris/arch-v32/lib/spinlock.S
index 79087ef..fe610b9 100644
--- a/arch/cris/arch-v32/lib/spinlock.S
+++ b/arch/cris/arch-v32/lib/spinlock.S
@@ -6,7 +6,9 @@
 
 
 	.global cris_spin_lock
+	.type   cris_spin_lock,@function
 	.global cris_spin_trylock
+	.type   cris_spin_trylock,@function
 
 	.text
 
@@ -22,6 +24,8 @@ cris_spin_lock:
 	ret
 	nop
 
+	.size   cris_spin_lock, . - cris_spin_lock
+
 cris_spin_trylock:
 	clearf	p
 1:	move.b	[$r10], $r11
@@ -31,3 +35,6 @@ cris_spin_trylock:
         clearf	p
 	ret
 	movu.b	$r11,$r10
+
+	.size   cris_spin_trylock, . - cris_spin_trylock
+
diff --git a/arch/cris/arch-v32/mach-a3/Kconfig b/arch/cris/arch-v32/mach-a3/Kconfig
index a4df06d..7796aaf 100644
--- a/arch/cris/arch-v32/mach-a3/Kconfig
+++ b/arch/cris/arch-v32/mach-a3/Kconfig
@@ -33,6 +33,10 @@ config ETRAX_DDR2_CONFIG
 	hex "DDR2 config"
 	default "0"
 
+config ETRAX_DDR2_LATENCY
+	hex "DDR2 latency"
+	default "0"
+
 config ETRAX_PIO_CE0_CFG
        hex "PIO CE0 configuration"
        default "0"
diff --git a/arch/cris/arch-v32/mach-a3/dram_init.S b/arch/cris/arch-v32/mach-a3/dram_init.S
index 94d6b41..ec8648b 100644
--- a/arch/cris/arch-v32/mach-a3/dram_init.S
+++ b/arch/cris/arch-v32/mach-a3/dram_init.S
@@ -24,11 +24,21 @@
 
 	;; Refer to ddr2 MDS for initialization sequence
 
+	; 2. Wait 200us
+	move.d   10000, $r2
+1:	bne      1b
+	subq     1, $r2
+
 	; Start clock
 	move.d   REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
 	move.d   REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1
 	move.d   $r1, [$r0]
 
+	; 2. Wait 200us
+	move.d   10000, $r2
+1:	bne      1b
+	subq     1, $r2
+
 	; Reset phy and start calibration
 	move.d   REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
 	move.d   REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \
@@ -52,6 +62,10 @@ do_cmd:
 	lslq     16, $r1
 	or.d     $r3, $r1
 	move.d   $r1, [$r0]
+	; 2. Wait 200us
+	move.d   10000, $r4
+1:	bne      1b
+	subq     1, $r4
 	cmp.d    sdram_commands_end, $r2
 	blo      command_loop
 	nop
@@ -63,7 +77,7 @@ do_cmd:
 
 	; Set latency
 	move.d   REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0
-	move.d   0x13, $r1
+	move.d   CONFIG_ETRAX_DDR2_LATENCY, $r1
 	move.d   $r1, [$r0]
 
 	; Set configuration
diff --git a/arch/cris/arch-v32/mach-a3/hw_settings.S b/arch/cris/arch-v32/mach-a3/hw_settings.S
index 258a632..0145725 100644
--- a/arch/cris/arch-v32/mach-a3/hw_settings.S
+++ b/arch/cris/arch-v32/mach-a3/hw_settings.S
@@ -31,6 +31,8 @@
 	; Register values
 	.dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg)
 	.dword CONFIG_ETRAX_DDR2_CONFIG
+	.dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency)
+	.dword CONFIG_ETRAX_DDR2_LATENCY
 	.dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
 	.dword CONFIG_ETRAX_DDR2_TIMING
 	.dword CONFIG_ETRAX_DDR2_MRS
diff --git a/arch/cris/arch-v32/mm/init.c b/arch/cris/arch-v32/mm/init.c
index caeb921..0768bc4 100644
--- a/arch/cris/arch-v32/mm/init.c
+++ b/arch/cris/arch-v32/mm/init.c
@@ -27,8 +27,7 @@ extern void tlb_init(void);
  * at kseg_4 thus the ksegs are set up again. Also clear the TLB and do various
  * other paging stuff.
  */
-void __init
-cris_mmu_init(void)
+void __init cris_mmu_init(void)
 {
 	unsigned long mmu_config;
 	unsigned long mmu_kbase_hi;
@@ -55,14 +54,23 @@ cris_mmu_init(void)
 	/* Initialise the TLB. Function found in tlb.c. */
 	tlb_init();
 
-	/* Enable exceptions and initialize the kernel segments. */
+	/*
+	 * Enable exceptions and initialize the kernel segments.
+	 * See head.S for differences between ARTPEC-3 and ETRAX FS.
+	 */
 	mmu_config = ( REG_STATE(mmu, rw_mm_cfg, we, on)        |
 		       REG_STATE(mmu, rw_mm_cfg, acc, on)       |
 		       REG_STATE(mmu, rw_mm_cfg, ex, on)        |
 		       REG_STATE(mmu, rw_mm_cfg, inv, on)       |
+#ifdef CONFIG_CRIS_MACH_ARTPEC3
+		       REG_STATE(mmu, rw_mm_cfg, seg_f, page)   |
+		       REG_STATE(mmu, rw_mm_cfg, seg_e, page)   |
+		       REG_STATE(mmu, rw_mm_cfg, seg_d, linear) |
+#else
 		       REG_STATE(mmu, rw_mm_cfg, seg_f, linear) |
 		       REG_STATE(mmu, rw_mm_cfg, seg_e, linear) |
 		       REG_STATE(mmu, rw_mm_cfg, seg_d, page)   |
+#endif
 		       REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |
 		       REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |
 #ifndef CONFIG_ETRAX_VCS_SIM
@@ -81,9 +89,15 @@ cris_mmu_init(void)
 		       REG_STATE(mmu, rw_mm_cfg, seg_1, page)   |
 		       REG_STATE(mmu, rw_mm_cfg, seg_0, page));
 
+	/* See head.S for differences between ARTPEC-3 and ETRAX FS. */
 	mmu_kbase_hi = ( REG_FIELD(mmu, rw_mm_kbase_hi, base_f, 0x0) |
+#ifdef CONFIG_CRIS_MACH_ARTPEC3
+			 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x0) |
+			 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x5) |
+#else
 			 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x8) |
 			 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x0) |
+#endif
                          REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) |
 			 REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) |
 #ifndef CONFIG_ETRAX_VCS_SIM
@@ -129,8 +143,7 @@ cris_mmu_init(void)
 	SUPP_REG_WR(RW_GC_CFG, 0xf); /* IMMU, DMMU, ICache, DCache on */
 }
 
-void __init
-paging_init(void)
+void __init paging_init(void)
 {
 	int i;
 	unsigned long zones_size[MAX_NR_ZONES];
diff --git a/arch/cris/arch-v32/mm/mmu.S b/arch/cris/arch-v32/mm/mmu.S
index f125d91..72727c1 100644
--- a/arch/cris/arch-v32/mm/mmu.S
+++ b/arch/cris/arch-v32/mm/mmu.S
@@ -38,6 +38,7 @@
 ; to handle the fault.
 .macro	MMU_BUS_FAULT_HANDLER handler, mmu, we, ex
 	.globl	\handler
+	.type   \handler,"function"
 \handler:
 	SAVE_ALL
 	move	\mmu, $srs	; Select MMU support register bank
@@ -52,6 +53,7 @@
 	nop
 	ba	ret_from_intr
 	nop
+	.size   \handler, . - \handler
 .endm
 
 ; Refill handler. Three cases may occur:
@@ -84,6 +86,7 @@
 2:	.dword	0		; last_refill_cause
 	.text
 	.globl \handler
+	.type   \handler, "function"
 \handler:
 	subq	4, $sp
 ; (The pipeline stalls for one cycle; $sp used as address in the next cycle.)
@@ -196,6 +199,7 @@
 	; Return
 	ba	ret_from_intr
 	nop
+	.size   \handler, . - \handler
 .endm
 
 	; This is the MMU bus fault handlers.