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authorChris Dearman <chris@mips.com>2007-12-13 22:42:19 +0000
committerRalf Baechle <ralf@linux-mips.org>2007-12-14 17:34:30 +0000
commitbbaf238b5f910f8f3dda4b96cf844f50b2dcc6fa (patch)
tree5fe8f78dcc4ac82f468e4976f28e798b9052f6e1 /arch/mips/kernel/traps.c
parent4037500ebcfd172a15aed40caa847c52e9906712 (diff)
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[MIPS] Ensure that ST0_FR is never set on a 32 bit kernel
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r--arch/mips/kernel/traps.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 23e73d0..fcae667 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1317,12 +1317,12 @@ void __init per_cpu_trap_init(void)
#endif
if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
status_set |= ST0_XX;
+ if (cpu_has_dsp)
+ status_set |= ST0_MX;
+
change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
status_set);
- if (cpu_has_dsp)
- set_c0_status(ST0_MX);
-
#ifdef CONFIG_CPU_MIPSR2
if (cpu_has_mips_r2) {
unsigned int enable = 0x0000000f;