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| author | Ralf Baechle <ralf@linux-mips.org> | 2005-09-03 15:56:17 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@evo.osdl.org> | 2005-09-05 00:06:07 -0700 |
| commit | 42a3b4f25af8f8d77feddf27f839fa0628dbff1a (patch) | |
| tree | 332370ff3889fabb66a45fb5dcf605b142de77c8 /arch/mips/mips-boards | |
| parent | 875d43e72b5bf22161a81de7554f88eccf8a51ae (diff) | |
| download | kernel_samsung_aries-42a3b4f25af8f8d77feddf27f839fa0628dbff1a.zip kernel_samsung_aries-42a3b4f25af8f8d77feddf27f839fa0628dbff1a.tar.gz kernel_samsung_aries-42a3b4f25af8f8d77feddf27f839fa0628dbff1a.tar.bz2 | |
[PATCH] mips: nuke trailing whitespace
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/mips/mips-boards')
| -rw-r--r-- | arch/mips/mips-boards/atlas/atlas_int.c | 2 | ||||
| -rw-r--r-- | arch/mips/mips-boards/generic/init.c | 6 | ||||
| -rw-r--r-- | arch/mips/mips-boards/generic/time.c | 2 | ||||
| -rw-r--r-- | arch/mips/mips-boards/malta/malta_setup.c | 6 |
4 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index 8f1d875..19d4b07 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c @@ -122,7 +122,7 @@ void __init arch_init_irq(void) int i; atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *)); - + /* * Mask out all interrupt by writing "1" to all bit position in * the interrupt reset reg. diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c index 31caf06..311155d 100644 --- a/arch/mips/mips-boards/generic/init.c +++ b/arch/mips/mips-boards/generic/init.c @@ -200,7 +200,7 @@ void __init kgdb_config (void) generic_putDebugChar = saa9730_putDebugChar; generic_getDebugChar = saa9730_getDebugChar; } - else + else #endif { speed = rs_kgdb_hook(line, speed); @@ -243,7 +243,7 @@ void __init prom_init(void) mips_revision_corid = MIPS_REVISION_CORID; if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) { - if (BONITO_PCIDID == 0x0001df53 || + if (BONITO_PCIDID == 0x0001df53 || BONITO_PCIDID == 0x0003df53) mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON; else @@ -310,7 +310,7 @@ void __init prom_init(void) case MIPS_REVISION_CORID_CORE_MSC: case MIPS_REVISION_CORID_CORE_FPGA2: case MIPS_REVISION_CORID_CORE_EMUL_MSC: - _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); + _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); #ifdef CONFIG_CPU_LITTLE_ENDIAN MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP); diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index fe7fc17..1631544 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -89,7 +89,7 @@ static unsigned int __init estimate_cpu_frequency(void) * really calculate the timer frequency * For now we hardwire the SEAD board frequency to 12MHz. */ - + if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) || (prid == (PRID_COMP_MIPS | PRID_IMP_25KF))) count = 12000000; diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index 3377e66..df6db64 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c @@ -149,15 +149,15 @@ static int __init malta_setup(void) argptr = prom_getcmdline(); if (strstr(argptr, "iobcuncached")) { BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; - BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & + BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); printk("Disabled Bonito IOBC coherency\n"); } else { BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; - BONITO_PCIMEMBASECFG |= - (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | + BONITO_PCIMEMBASECFG |= + (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); printk("Disabled Bonito IOBC coherency\n"); } |