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authorPaul Mundt <lethal@linux-sh.org>2010-01-13 19:11:14 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-01-13 19:11:14 +0900
commit782bb5a532f883540bf403afb19f735a4eefd95b (patch)
treec2eec8aff6797fda269d4f1c3d4ed19ff1d584d7 /arch/sh/mm/Kconfig
parent206582c3161f165f5bf49ececa962c5f95fdf0a3 (diff)
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sh: default to extended TLB support.
All SH-X2 and SH-X3 parts support an extended TLB mode, which has been left as experimental since support was originally merged. Now that it's had some time to stabilize and get some exposure to various platforms, we can drop it as an option and default enable it across the board. This is also good future proofing for newer parts that will drop support for the legacy TLB mode completely. This will also force 3-level page tables for all newer parts, which is necessary both for the varying page sizes and larger memories. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/Kconfig')
-rw-r--r--arch/sh/mm/Kconfig29
1 files changed, 2 insertions, 27 deletions
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 860cd24..7a4ebc8 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -100,13 +100,8 @@ config PMB_LEGACY
and allows systems to support up to 512MiB of system memory.
config X2TLB
- bool "Enable extended TLB mode"
- depends on (CPU_SHX2 || CPU_SHX3) && MMU && EXPERIMENTAL
- help
- Selecting this option will enable the extended mode of the SH-X2
- TLB. For legacy SH-X behaviour and interoperability, say N. For
- all of the fun new features and a willingless to submit bug reports,
- say Y.
+ def_bool y
+ depends on (CPU_SHX2 || CPU_SHX3) && MMU
config VSYSCALL
bool "Support vsyscall page"
@@ -175,31 +170,11 @@ config ARCH_MEMORY_PROBE
depends on MEMORY_HOTPLUG
choice
- prompt "Page table layout"
- default PGTABLE_LEVELS_3 if X2TLB
- default PGTABLE_LEVELS_2
-
-config PGTABLE_LEVELS_2
- bool "2 Levels"
- help
- This is the default page table layout for all SuperH CPUs.
-
-config PGTABLE_LEVELS_3
- bool "3 Levels"
- depends on X2TLB
- help
- This enables a 3 level page table structure.
-
-endchoice
-
-choice
prompt "Kernel page size"
- default PAGE_SIZE_8KB if X2TLB
default PAGE_SIZE_4KB
config PAGE_SIZE_4KB
bool "4kB"
- depends on !MMU || !X2TLB || PGTABLE_LEVELS_3
help
This is the default page size used by all SuperH CPUs.