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authorThomas Gleixner <tglx@linutronix.de>2008-01-30 13:34:08 +0100
committerIngo Molnar <mingo@elte.hu>2008-01-30 13:34:08 +0100
commitcd8ddf1a2800026dd58433333cce7a65cbc6c6d2 (patch)
tree4f741ddde5efa85299e900a24a71f893fc7ed34d /arch/x86
parentaf1e6844d60057774910a2d08bd75b67d73ba7d5 (diff)
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x86: clflush_page_range needs mfence
clflush is an unordered operation with respect to other memory traffic, including other CLFLUSH instructions. This needs proper fencing with mfence. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/mm/pageattr.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index cdd2ea2..90b658a 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -25,12 +25,24 @@ within(unsigned long addr, unsigned long start, unsigned long end)
/*
* Flushing functions
*/
+
+
+/**
+ * clflush_cache_range - flush a cache range with clflush
+ * @addr: virtual start address
+ * @size: number of bytes to flush
+ *
+ * clflush is an unordered instruction which needs fencing with mfence
+ * to avoid ordering issues.
+ */
void clflush_cache_range(void *addr, int size)
{
int i;
+ mb();
for (i = 0; i < size; i += boot_cpu_data.x86_clflush_size)
clflush(addr+i);
+ mb();
}
static void __cpa_flush_all(void *arg)