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| author | Arve Hjønnevåg <arve@android.com> | 2011-04-11 17:22:40 -0700 |
|---|---|---|
| committer | Arve Hjønnevåg <arve@android.com> | 2011-11-16 19:56:15 -0800 |
| commit | 0a7a32fc2b276546ea40281d61d32e5d1e47b8da (patch) | |
| tree | eae8f375cea052e395171327f22acb66bc798f47 /drivers/mmc | |
| parent | c0c927aecf41cb60f786fb482ff01d62e381e0f6 (diff) | |
| download | kernel_samsung_aries-0a7a32fc2b276546ea40281d61d32e5d1e47b8da.zip kernel_samsung_aries-0a7a32fc2b276546ea40281d61d32e5d1e47b8da.tar.gz kernel_samsung_aries-0a7a32fc2b276546ea40281d61d32e5d1e47b8da.tar.bz2 | |
mmc: sdhci-s3c: Always update the clock on the first call to set_clock
If the last clock in the array is not the fastest, and the first
call(s) to set_clock selected this clock source, then set_clock
would return with a wrong host->max_clk value and sdhci_set_clock
would program the wrong divider.
The change that initialized cur_clk to the last usable clock
(instead of 0) exposed this bug, but the old code would also have
hit the same problem if the selected (not-fastest) clock was first
in the array.
Change-Id: If1aa5db80af8dcba0199b7c1ed2bb348fa84c9b9
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-s3c.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 8cd999f..bfbd2d2 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -45,6 +45,7 @@ struct sdhci_s3c { struct resource *ioarea; struct s3c_sdhci_platdata *pdata; unsigned int cur_clk; + bool cur_clk_set; int ext_cd_irq; int ext_cd_gpio; @@ -187,13 +188,14 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) /* select the new clock source */ - if (ourhost->cur_clk != best_src) { + if (ourhost->cur_clk != best_src || !ourhost->cur_clk_set) { struct clk *clk = ourhost->clk_bus[best_src]; /* turn clock off to card before changing clock source */ writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); ourhost->cur_clk = best_src; + ourhost->cur_clk_set = true; host->max_clk = clk_get_rate(clk); ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); |