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| author | Jesper Nilsson <jespern@stork.se.axis.com> | 2007-11-29 17:21:59 +0100 |
|---|---|---|
| committer | Jesper Nilsson <jesper.nilsson@axis.com> | 2008-02-08 11:06:23 +0100 |
| commit | 58d083192825c5fbd46fa0b1ff4d1ecc9118b692 (patch) | |
| tree | 3bd39bf385afe376272d4769c0af321d6e8ed992 /include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h | |
| parent | 035e111f9a9b29843bc899f03d56f19d94bebb53 (diff) | |
| download | kernel_samsung_aries-58d083192825c5fbd46fa0b1ff4d1ecc9118b692.zip kernel_samsung_aries-58d083192825c5fbd46fa0b1ff4d1ecc9118b692.tar.gz kernel_samsung_aries-58d083192825c5fbd46fa0b1ff4d1ecc9118b692.tar.bz2 | |
CRIS v32: Add hardware dependent include files and defconfigs for ETRAX FS and ARTPEC-3 chips.
The header files describe the hardware registers available in both
these chips, note that most of this documentation is automatically
generated from the hardware implementation.
Diffstat (limited to 'include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h')
| -rw-r--r-- | include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h b/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h new file mode 100644 index 0000000..bea699a --- /dev/null +++ b/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h @@ -0,0 +1,46 @@ +/* Interrupt vector numbers autogenerated by ../../../tools/rdesc/bin/rdes2intr + from intr_vect.r */ + +#ifndef _INTR_VECT_R +#define _INTR_VECT_R +#define TIMER0_INTR_VECT 0x31 +#define TIMER1_INTR_VECT 0x32 +#define DMA0_INTR_VECT 0x33 +#define DMA1_INTR_VECT 0x34 +#define DMA2_INTR_VECT 0x35 +#define DMA3_INTR_VECT 0x36 +#define DMA4_INTR_VECT 0x37 +#define DMA5_INTR_VECT 0x38 +#define DMA6_INTR_VECT 0x39 +#define DMA7_INTR_VECT 0x3a +#define DMA9_INTR_VECT 0x3b +#define DMA11_INTR_VECT 0x3c +#define GIO_INTR_VECT 0x3d +#define IOP0_INTR_VECT 0x3e +#define IOP1_INTR_VECT 0x3f +#define SER0_INTR_VECT 0x40 +#define SER1_INTR_VECT 0x41 +#define SER2_INTR_VECT 0x42 +#define SER3_INTR_VECT 0x43 +#define SER4_INTR_VECT 0x44 +#define SSER_INTR_VECT 0x45 +#define STRDMA0_INTR_VECT 0x46 +#define STRDMA1_INTR_VECT 0x47 +#define STRDMA2_INTR_VECT 0x48 +#define STRDMA3_INTR_VECT 0x49 +#define STRDMA5_INTR_VECT 0x4a +#define VIN_INTR_VECT 0x4b +#define VOUT_INTR_VECT 0x4c +#define JPEG_INTR_VECT 0x4d +#define H264_INTR_VECT 0x4e +#define HISTO_INTR_VECT 0x4f +#define CCD_INTR_VECT 0x50 +#define ETH_INTR_VECT 0x51 +#define MEMARB_BAR_INTR_VECT 0x52 +#define MEMARB_FOO_INTR_VECT 0x53 +#define PIO_INTR_VECT 0x54 +#define SCLR_INTR_VECT 0x55 +#define SCLR_FIFO_INTR_VECT 0x56 +#define IPI_INTR_VECT 0x57 +#define NBR_INTR_VECT 0x58 +#endif |