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author | David Gibson <david@gibson.dropbear.id.au> | 2007-05-08 12:46:49 +1000 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-05-08 13:40:31 +1000 |
commit | d1953c8888ef034b912ee33bc2ea2cce6a414402 (patch) | |
tree | 525e581603a2dd8622b821304440b6ce14b535ae /include/asm-powerpc/pgtable-ppc32.h | |
parent | 00c2ae35bd50664bcd841becc6efceef8aa5d074 (diff) | |
download | kernel_samsung_aries-d1953c8888ef034b912ee33bc2ea2cce6a414402.zip kernel_samsung_aries-d1953c8888ef034b912ee33bc2ea2cce6a414402.tar.gz kernel_samsung_aries-d1953c8888ef034b912ee33bc2ea2cce6a414402.tar.bz2 |
[POWERPC] Remove use of 4level-fixup.h for ppc32
For 32-bit systems, powerpc still relies on the 4level-fixup.h hack,
to pretend that the generic pagetable handling stuff is 3-levels
rather than 4. This patch removes this, instead using the newer
pgtable-nopmd.h to handle the elision of both the pud and pmd
pagetable levels (ppc32 pagetables are actually 2 levels).
This removes a little extraneous code, and makes it more easily
compared to the 64-bit pagetable code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/pgtable-ppc32.h')
-rw-r--r-- | include/asm-powerpc/pgtable-ppc32.h | 30 |
1 files changed, 2 insertions, 28 deletions
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index e704640..09662a2 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -1,7 +1,7 @@ #ifndef _ASM_POWERPC_PGTABLE_PPC32_H #define _ASM_POWERPC_PGTABLE_PPC32_H -#include <asm-generic/4level-fixup.h> +#include <asm-generic/pgtable-nopmd.h> #ifndef __ASSEMBLY__ #include <linux/sched.h> @@ -76,13 +76,8 @@ extern unsigned long ioremap_bot, ioremap_base; * level has 2048 entries and the second level has 512 64-bit PTE entries. * -Matt */ -/* PMD_SHIFT determines the size of the area mapped by the PTE pages */ -#define PMD_SHIFT (PAGE_SHIFT + PTE_SHIFT) -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) - /* PGDIR_SHIFT determines what a top-level page table entry can map */ -#define PGDIR_SHIFT PMD_SHIFT +#define PGDIR_SHIFT (PAGE_SHIFT + PTE_SHIFT) #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) @@ -103,8 +98,6 @@ extern unsigned long ioremap_bot, ioremap_base; #define pte_ERROR(e) \ printk("%s:%d: bad pte %llx.\n", __FILE__, __LINE__, \ (unsigned long long)pte_val(e)) -#define pmd_ERROR(e) \ - printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) @@ -516,19 +509,6 @@ extern unsigned long empty_zero_page[1024]; #ifndef __ASSEMBLY__ /* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - */ -static inline int pgd_none(pgd_t pgd) { return 0; } -static inline int pgd_bad(pgd_t pgd) { return 0; } -static inline int pgd_present(pgd_t pgd) { return 1; } -#define pgd_clear(xp) do { } while (0) - -#define pgd_page_vaddr(pgd) \ - ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK)) - -/* * The following only work if pte_present() is true. * Undefined behaviour if not.. */ @@ -737,12 +717,6 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, #define pgd_index(address) ((address) >> PGDIR_SHIFT) #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) -/* Find an entry in the second-level page table.. */ -static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) -{ - return (pmd_t *) dir; -} - /* Find an entry in the third-level page table.. */ #define pte_index(address) \ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) |