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author | Geoff Levand <geoffrey.levand@am.sony.com> | 2006-06-19 20:33:29 +0200 |
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committer | Paul Mackerras <paulus@samba.org> | 2006-06-21 15:01:31 +1000 |
commit | 540270d82db943855538cea5d0c790e7e669dda0 (patch) | |
tree | e13b8194d8781b2f5d3bf6566a8d96ecc943f8f3 /include | |
parent | c01ea72a3b8abb7baa4291a1876b82599867035a (diff) | |
download | kernel_samsung_aries-540270d82db943855538cea5d0c790e7e669dda0.zip kernel_samsung_aries-540270d82db943855538cea5d0c790e7e669dda0.tar.gz kernel_samsung_aries-540270d82db943855538cea5d0c790e7e669dda0.tar.bz2 |
[POWERPC] spufs: further abstract priv1 register access
To support muti-platform binaries the spu hypervisor accessor
routines must have runtime binding.
I removed the existing statically linked routines in spu.h
and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h
that operate indirectly through an ops struct spu_priv1_ops.
spu_priv1_mmio.c contains the instance of the accessor routines
for running on raw hardware.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/spu.h | 23 | ||||
-rw-r--r-- | include/asm-powerpc/spu_priv1.h | 182 |
2 files changed, 182 insertions, 23 deletions
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index 9464899..c7812e9 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h @@ -183,29 +183,6 @@ static inline void unregister_spu_syscalls(struct spufs_calls *calls) #endif /* MODULE */ -/* access to priv1 registers */ -void spu_int_mask_and(struct spu *spu, int class, u64 mask); -void spu_int_mask_or(struct spu *spu, int class, u64 mask); -void spu_int_mask_set(struct spu *spu, int class, u64 mask); -u64 spu_int_mask_get(struct spu *spu, int class); -void spu_int_stat_clear(struct spu *spu, int class, u64 stat); -u64 spu_int_stat_get(struct spu *spu, int class); -void spu_int_route_set(struct spu *spu, u64 route); -u64 spu_mfc_dar_get(struct spu *spu); -u64 spu_mfc_dsisr_get(struct spu *spu); -void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr); -void spu_mfc_sdr_set(struct spu *spu, u64 sdr); -void spu_mfc_sr1_set(struct spu *spu, u64 sr1); -u64 spu_mfc_sr1_get(struct spu *spu); -void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id); -u64 spu_mfc_tclass_id_get(struct spu *spu); -void spu_tlb_invalidate(struct spu *spu); -void spu_resource_allocation_groupID_set(struct spu *spu, u64 id); -u64 spu_resource_allocation_groupID_get(struct spu *spu); -void spu_resource_allocation_enable_set(struct spu *spu, u64 enable); -u64 spu_resource_allocation_enable_get(struct spu *spu); - - /* * This defines the Local Store, Problem Area and Privlege Area of an SPU. */ diff --git a/include/asm-powerpc/spu_priv1.h b/include/asm-powerpc/spu_priv1.h new file mode 100644 index 0000000..cb87d1f --- /dev/null +++ b/include/asm-powerpc/spu_priv1.h @@ -0,0 +1,182 @@ +/* + * Defines an spu hypervisor abstraction layer. + * + * Copyright 2006 Sony Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#if !defined(_SPU_PRIV1_H) +#define _SPU_PRIV1_H +#if defined(__KERNEL__) + +struct spu; + +/* access to priv1 registers */ + +struct spu_priv1_ops +{ + void (*int_mask_and) (struct spu *spu, int class, u64 mask); + void (*int_mask_or) (struct spu *spu, int class, u64 mask); + void (*int_mask_set) (struct spu *spu, int class, u64 mask); + u64 (*int_mask_get) (struct spu *spu, int class); + void (*int_stat_clear) (struct spu *spu, int class, u64 stat); + u64 (*int_stat_get) (struct spu *spu, int class); + void (*int_route_set) (struct spu *spu, u64 route); + u64 (*mfc_dar_get) (struct spu *spu); + u64 (*mfc_dsisr_get) (struct spu *spu); + void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr); + void (*mfc_sdr_set) (struct spu *spu, u64 sdr); + void (*mfc_sr1_set) (struct spu *spu, u64 sr1); + u64 (*mfc_sr1_get) (struct spu *spu); + void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id); + u64 (*mfc_tclass_id_get) (struct spu *spu); + void (*tlb_invalidate) (struct spu *spu); + void (*resource_allocation_groupID_set) (struct spu *spu, u64 id); + u64 (*resource_allocation_groupID_get) (struct spu *spu); + void (*resource_allocation_enable_set) (struct spu *spu, u64 enable); + u64 (*resource_allocation_enable_get) (struct spu *spu); +}; + +extern const struct spu_priv1_ops* spu_priv1_ops; + +static inline void +spu_int_mask_and (struct spu *spu, int class, u64 mask) +{ + spu_priv1_ops->int_mask_and(spu, class, mask); +} + +static inline void +spu_int_mask_or (struct spu *spu, int class, u64 mask) +{ + spu_priv1_ops->int_mask_or(spu, class, mask); +} + +static inline void +spu_int_mask_set (struct spu *spu, int class, u64 mask) +{ + spu_priv1_ops->int_mask_set(spu, class, mask); +} + +static inline u64 +spu_int_mask_get (struct spu *spu, int class) +{ + return spu_priv1_ops->int_mask_get(spu, class); +} + +static inline void +spu_int_stat_clear (struct spu *spu, int class, u64 stat) +{ + spu_priv1_ops->int_stat_clear(spu, class, stat); +} + +static inline u64 +spu_int_stat_get (struct spu *spu, int class) +{ + return spu_priv1_ops->int_stat_get (spu, class); +} + +static inline void +spu_int_route_set (struct spu *spu, u64 route) +{ + spu_priv1_ops->int_stat_get(spu, route); +} + +static inline u64 +spu_mfc_dar_get (struct spu *spu) +{ + return spu_priv1_ops->mfc_dar_get(spu); +} + +static inline u64 +spu_mfc_dsisr_get (struct spu *spu) +{ + return spu_priv1_ops->mfc_dsisr_get(spu); +} + +static inline void +spu_mfc_dsisr_set (struct spu *spu, u64 dsisr) +{ + spu_priv1_ops->mfc_dsisr_set(spu, dsisr); +} + +static inline void +spu_mfc_sdr_set (struct spu *spu, u64 sdr) +{ + spu_priv1_ops->mfc_sdr_set(spu, sdr); +} + +static inline void +spu_mfc_sr1_set (struct spu *spu, u64 sr1) +{ + spu_priv1_ops->mfc_sr1_set(spu, sr1); +} + +static inline u64 +spu_mfc_sr1_get (struct spu *spu) +{ + return spu_priv1_ops->mfc_sr1_get(spu); +} + +static inline void +spu_mfc_tclass_id_set (struct spu *spu, u64 tclass_id) +{ + spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id); +} + +static inline u64 +spu_mfc_tclass_id_get (struct spu *spu) +{ + return spu_priv1_ops->mfc_tclass_id_get(spu); +} + +static inline void +spu_tlb_invalidate (struct spu *spu) +{ + spu_priv1_ops->tlb_invalidate(spu); +} + +static inline void +spu_resource_allocation_groupID_set (struct spu *spu, u64 id) +{ + spu_priv1_ops->resource_allocation_groupID_set(spu, id); +} + +static inline u64 +spu_resource_allocation_groupID_get (struct spu *spu) +{ + return spu_priv1_ops->resource_allocation_groupID_get(spu); +} + +static inline void +spu_resource_allocation_enable_set (struct spu *spu, u64 enable) +{ + spu_priv1_ops->resource_allocation_enable_set(spu, enable); +} + +static inline u64 +spu_resource_allocation_enable_get (struct spu *spu) +{ + return spu_priv1_ops->resource_allocation_enable_get(spu); +} + +/* The declarations folowing are put here for convenience + * and only intended to be used by the platform setup code + * for initializing spu_priv1_ops. + */ + +extern const struct spu_priv1_ops spu_priv1_mmio_ops; + +#endif /* __KERNEL__ */ +#endif |