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authorVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 22:38:05 +0400
committerVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 22:38:05 +0400
commitd3465c921f79cfef0a4a8ceeeef9a3721bbbb57d (patch)
tree73d602a02efd3f358990dcfa9231131e69318d3b /include
parentfc8e50e349aa722d9f97ed9ba30e324ede8fa408 (diff)
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POWERPC: overhaul with cpm2_map mechanism
Incorporating the new way of cpm2 immr access, introduced in the previous patch, into CPM2 peripheral devices (fs_enet and cpm_uart). Both ppc and powerpc approved working( real actions taken in powerpc only, ppc just has a wrapper to keep init stuff consistent). Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-ppc/cpm2.h53
-rw-r--r--include/linux/fs_enet_pd.h10
-rw-r--r--include/linux/fs_uart_pd.h4
3 files changed, 62 insertions, 5 deletions
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index bd6623a..220cc2d 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1196,5 +1196,58 @@ typedef struct im_idma {
#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1)
#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2)
+/* Clocks and GRG's */
+
+enum cpm_clk_dir {
+ CPM_CLK_RX,
+ CPM_CLK_TX,
+ CPM_CLK_RTX
+};
+
+enum cpm_clk_target {
+ CPM_CLK_SCC1,
+ CPM_CLK_SCC2,
+ CPM_CLK_SCC3,
+ CPM_CLK_SCC4,
+ CPM_CLK_FCC1,
+ CPM_CLK_FCC2,
+ CPM_CLK_FCC3
+};
+
+enum cpm_clk {
+ CPM_CLK_NONE = 0,
+ CPM_BRG1, /* Baud Rate Generator 1 */
+ CPM_BRG2, /* Baud Rate Generator 2 */
+ CPM_BRG3, /* Baud Rate Generator 3 */
+ CPM_BRG4, /* Baud Rate Generator 4 */
+ CPM_BRG5, /* Baud Rate Generator 5 */
+ CPM_BRG6, /* Baud Rate Generator 6 */
+ CPM_BRG7, /* Baud Rate Generator 7 */
+ CPM_BRG8, /* Baud Rate Generator 8 */
+ CPM_CLK1, /* Clock 1 */
+ CPM_CLK2, /* Clock 2 */
+ CPM_CLK3, /* Clock 3 */
+ CPM_CLK4, /* Clock 4 */
+ CPM_CLK5, /* Clock 5 */
+ CPM_CLK6, /* Clock 6 */
+ CPM_CLK7, /* Clock 7 */
+ CPM_CLK8, /* Clock 8 */
+ CPM_CLK9, /* Clock 9 */
+ CPM_CLK10, /* Clock 10 */
+ CPM_CLK11, /* Clock 11 */
+ CPM_CLK12, /* Clock 12 */
+ CPM_CLK13, /* Clock 13 */
+ CPM_CLK14, /* Clock 14 */
+ CPM_CLK15, /* Clock 15 */
+ CPM_CLK16, /* Clock 16 */
+ CPM_CLK17, /* Clock 17 */
+ CPM_CLK18, /* Clock 18 */
+ CPM_CLK19, /* Clock 19 */
+ CPM_CLK20, /* Clock 20 */
+ CPM_CLK_DUMMY
+};
+
+extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
+
#endif /* __CPM2__ */
#endif /* __KERNEL__ */
diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h
index 74ed35a..9322235 100644
--- a/include/linux/fs_enet_pd.h
+++ b/include/linux/fs_enet_pd.h
@@ -87,18 +87,20 @@ struct fs_mii_bb_platform_info {
};
struct fs_platform_info {
-
- void(*init_ioports)(void);
+
+ void(*init_ioports)(struct fs_platform_info *);
/* device specific information */
int fs_no; /* controller index */
u32 cp_page; /* CPM page */
u32 cp_block; /* CPM sblock */
-
+
u32 clk_trx; /* some stuff for pins & mux configuration*/
+ u32 clk_rx;
+ u32 clk_tx;
u32 clk_route;
u32 clk_mask;
-
+
u32 mem_offset;
u32 dpram_offset;
u32 fcc_regs_c;
diff --git a/include/linux/fs_uart_pd.h b/include/linux/fs_uart_pd.h
index f597512..a99a020 100644
--- a/include/linux/fs_uart_pd.h
+++ b/include/linux/fs_uart_pd.h
@@ -46,7 +46,7 @@ static inline int fs_uart_id_fsid2smc(int id)
}
struct fs_uart_platform_info {
- void(*init_ioports)(void);
+ void(*init_ioports)(struct fs_uart_platform_info *);
/* device specific information */
int fs_no; /* controller index */
u32 uart_clk;
@@ -55,6 +55,8 @@ struct fs_uart_platform_info {
u8 rx_num_fifo;
u8 rx_buf_size;
u8 brg;
+ u8 clk_rx;
+ u8 clk_tx;
};
#endif