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authorJuergen Beisert <j.beisert@pengutronix.de>2008-07-05 10:02:47 +0200
committerRobert Schwebel <r.schwebel@pengutronix.de>2008-07-05 10:02:47 +0200
commitc0db2ea4e366c94dd3f880928c02534156e3d1b9 (patch)
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parent38a41fdf94c449c165213e4665c3f8a0d30f8aba (diff)
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MXC family: Add clock handling
Internal clock path handling for the mxc CPUs. Changed against the original Freescale code (and against clocklib for example): - clock rate is always calculated whenever one ask for the current rate (means struct clk has no more a member called "rate"). So switching the PLL base frequency will propagate immediately to all other clocks that are depending on this frequency. Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
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