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Diffstat (limited to 'arch/sh/boards/renesas/r7780rp/io.c')
-rw-r--r--arch/sh/boards/renesas/r7780rp/io.c152
1 files changed, 42 insertions, 110 deletions
diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c
index 311cccc..f74d2ff 100644
--- a/arch/sh/boards/renesas/r7780rp/io.c
+++ b/arch/sh/boards/renesas/r7780rp/io.c
@@ -11,22 +11,9 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/types.h>
+#include <linux/io.h>
#include <asm/r7780rp.h>
#include <asm/addrspace.h>
-#include <asm/io.h>
-
-static inline unsigned long port2adr(unsigned int port)
-{
- if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
- if (port == 0x3f6)
- return (PA_AREA5_IO + 0x80c);
- else
- return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
- else
- maybebadio((unsigned long)port);
-
- return port;
-}
static inline unsigned long port88796l(unsigned int port, int flag)
{
@@ -40,18 +27,6 @@ static inline unsigned long port88796l(unsigned int port, int flag)
return addr;
}
-/* The 7780 R7780RP-1 seems to have everything hooked */
-/* up pretty normally (nothing on high-bytes only...) so this */
-/* shouldn't be needed */
-static inline int shifted_port(unsigned long port)
-{
- /* For IDE registers, value is not shifted */
- if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
- return 0;
- else
- return 1;
-}
-
#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
#define CHECK_AX88796L_PORT(port) \
((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
@@ -70,12 +45,10 @@ u8 r7780rp_inb(unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
return ctrl_inw(port88796l(port, 0)) & 0xff;
- else if (PXSEG(port))
- return ctrl_inb(port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ else if (is_pci_ioaddr(port))
return ctrl_inb(pci_ioaddr(port));
- return ctrl_inw(port2adr(port)) & 0xff;
+ return ctrl_inw(port) & 0xff;
}
u8 r7780rp_inb_p(unsigned long port)
@@ -84,12 +57,10 @@ u8 r7780rp_inb_p(unsigned long port)
if (CHECK_AX88796L_PORT(port))
v = ctrl_inw(port88796l(port, 0)) & 0xff;
- else if (PXSEG(port))
- v = ctrl_inb(port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ else if (is_pci_ioaddr(port))
v = ctrl_inb(pci_ioaddr(port));
else
- v = ctrl_inw(port2adr(port)) & 0xff;
+ v = ctrl_inw(port) & 0xff;
ctrl_delay();
@@ -98,80 +69,56 @@ u8 r7780rp_inb_p(unsigned long port)
u16 r7780rp_inw(unsigned long port)
{
- if (CHECK_AX88796L_PORT(port))
- maybebadio(port);
- else if (PXSEG(port))
- return ctrl_inw(port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ if (is_pci_ioaddr(port))
return ctrl_inw(pci_ioaddr(port));
- else
- maybebadio(port);
- return 0;
+ return ctrl_inw(port);
}
u32 r7780rp_inl(unsigned long port)
{
- if (CHECK_AX88796L_PORT(port))
- maybebadio(port);
- else if (PXSEG(port))
- return ctrl_inl(port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ if (is_pci_ioaddr(port))
return ctrl_inl(pci_ioaddr(port));
- else
- maybebadio(port);
- return 0;
+ return ctrl_inl(port);
}
void r7780rp_outb(u8 value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
ctrl_outw(value, port88796l(port, 0));
- else if (PXSEG(port))
- ctrl_outb(value, port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ else if (is_pci_ioaddr(port))
ctrl_outb(value, pci_ioaddr(port));
else
- ctrl_outw(value, port2adr(port));
+ ctrl_outb(value, port);
}
void r7780rp_outb_p(u8 value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
ctrl_outw(value, port88796l(port, 0));
- else if (PXSEG(port))
- ctrl_outb(value, port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ else if (is_pci_ioaddr(port))
ctrl_outb(value, pci_ioaddr(port));
else
- ctrl_outw(value, port2adr(port));
+ ctrl_outb(value, port);
ctrl_delay();
}
void r7780rp_outw(u16 value, unsigned long port)
{
- if (CHECK_AX88796L_PORT(port))
- maybebadio(port);
- else if (PXSEG(port))
- ctrl_outw(value, port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ if (is_pci_ioaddr(port))
ctrl_outw(value, pci_ioaddr(port));
else
- maybebadio(port);
+ ctrl_outw(value, port);
}
void r7780rp_outl(u32 value, unsigned long port)
{
- if (CHECK_AX88796L_PORT(port))
- maybebadio(port);
- else if (PXSEG(port))
- ctrl_outl(value, port);
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ if (is_pci_ioaddr(port))
ctrl_outl(value, pci_ioaddr(port));
else
- maybebadio(port);
+ ctrl_outl(value, port);
}
void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
@@ -183,16 +130,13 @@ void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
p = (volatile u16 *)port88796l(port, 0);
while (count--)
*buf++ = *p & 0xff;
- } else if (PXSEG(port)) {
- while (count--)
- *buf++ = *(volatile u8 *)port;
- } else if (is_pci_ioaddr(port) || shifted_port(port)) {
+ } else if (is_pci_ioaddr(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*buf++ = *bp;
} else {
- p = (volatile u16 *)port2adr(port);
+ p = (volatile u16 *)port;
while (count--)
*buf++ = *p & 0xff;
}
@@ -205,30 +149,26 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
if (CHECK_AX88796L_PORT(port))
p = (volatile u16 *)port88796l(port, 1);
- else if (PXSEG(port))
- p = (volatile u16 *)port;
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ else if (is_pci_ioaddr(port))
p = (volatile u16 *)pci_ioaddr(port);
else
- p = (volatile u16 *)port2adr(port);
+ p = (volatile u16 *)port;
while (count--)
*buf++ = *p;
+
+ flush_dcache_all();
}
void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
{
- u32 *buf = dst;
-
- if (CHECK_AX88796L_PORT(port))
- maybebadio(port);
- else if (is_pci_ioaddr(port) || shifted_port(port)) {
+ if (is_pci_ioaddr(port)) {
volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
+ u32 *buf = dst;
while (count--)
*buf++ = *p;
- } else
- maybebadio(port);
+ }
}
void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
@@ -240,19 +180,14 @@ void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
p = (volatile u16 *)port88796l(port, 0);
while (count--)
*p = *buf++;
- } else if (PXSEG(port))
- while (count--)
- ctrl_outb(*buf++, port);
- else if (is_pci_ioaddr(port) || shifted_port(port)) {
+ } else if (is_pci_ioaddr(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*bp = *buf++;
- } else {
- p = (volatile u16 *)port2adr(port);
+ } else
while (count--)
- *p = *buf++;
- }
+ ctrl_outb(*buf++, port);
}
void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
@@ -262,40 +197,37 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
if (CHECK_AX88796L_PORT(port))
p = (volatile u16 *)port88796l(port, 1);
- else if (PXSEG(port))
- p = (volatile u16 *)port;
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ else if (is_pci_ioaddr(port))
p = (volatile u16 *)pci_ioaddr(port);
else
- p = (volatile u16 *)port2adr(port);
+ p = (volatile u16 *)port;
while (count--)
*p = *buf++;
+
+ flush_dcache_all();
}
void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
{
const u32 *buf = src;
+ u32 *p;
- if (CHECK_AX88796L_PORT(port))
- maybebadio(port);
- else if (is_pci_ioaddr(port) || shifted_port(port)) {
- volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
+ if (is_pci_ioaddr(port))
+ p = (u32 *)pci_ioaddr(port);
+ else
+ p = (u32 *)port;
- while (count--)
- *p = *buf++;
- } else
- maybebadio(port);
+ while (count--)
+ ctrl_outl(*buf++, (unsigned long)p);
}
void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
{
if (CHECK_AX88796L_PORT(port))
return (void __iomem *)port88796l(port, size > 1);
- else if (PXSEG(port))
- return (void __iomem *)port;
- else if (is_pci_ioaddr(port) || shifted_port(port))
+ else if (is_pci_ioaddr(port))
return (void __iomem *)pci_ioaddr(port);
- return (void __iomem *)port2adr(port);
+ return (void __iomem *)port;
}
generated by cgit v1.1 at 2024-12-28 07:33:38 +0000