diff options
Diffstat (limited to 'drivers/usb/musb/tusb6010.c')
-rw-r--r-- | drivers/usb/musb/tusb6010.c | 62 |
1 files changed, 33 insertions, 29 deletions
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c index c47aac4..b410357 100644 --- a/drivers/usb/musb/tusb6010.c +++ b/drivers/usb/musb/tusb6010.c @@ -106,7 +106,7 @@ static void tusb_wbus_quirk(struct musb *musb, int enabled) tmp = phy_otg_ena & ~WBUS_QUIRK_MASK; tmp |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_TESTM2; musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); - DBG(2, "Enabled tusb wbus quirk ctrl %08x ena %08x\n", + dev_dbg(musb->controller, "Enabled tusb wbus quirk ctrl %08x ena %08x\n", musb_readl(tbase, TUSB_PHY_OTG_CTRL), musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)); } else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE) @@ -115,7 +115,7 @@ static void tusb_wbus_quirk(struct musb *musb, int enabled) musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena; musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); - DBG(2, "Disabled tusb wbus quirk ctrl %08x ena %08x\n", + dev_dbg(musb->controller, "Disabled tusb wbus quirk ctrl %08x ena %08x\n", musb_readl(tbase, TUSB_PHY_OTG_CTRL), musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)); phy_otg_ctrl = 0; @@ -172,13 +172,14 @@ static inline void tusb_fifo_read_unaligned(void __iomem *fifo, void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf) { + struct musb *musb = hw_ep->musb; void __iomem *ep_conf = hw_ep->conf; void __iomem *fifo = hw_ep->fifo; u8 epnum = hw_ep->epnum; prefetch(buf); - DBG(4, "%cX ep%d fifo %p count %d buf %p\n", + dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", 'T', epnum, fifo, len, buf); if (epnum) @@ -221,11 +222,12 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf) void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf) { + struct musb *musb = hw_ep->musb; void __iomem *ep_conf = hw_ep->conf; void __iomem *fifo = hw_ep->fifo; u8 epnum = hw_ep->epnum; - DBG(4, "%cX ep%d fifo %p count %d buf %p\n", + dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", 'R', epnum, fifo, len, buf); if (epnum) @@ -304,7 +306,7 @@ static int tusb_draw_power(struct otg_transceiver *x, unsigned mA) } musb_writel(tbase, TUSB_PRCM_MNGMT, reg); - DBG(2, "draw max %d mA VBUS\n", mA); + dev_dbg(musb->controller, "draw max %d mA VBUS\n", mA); return 0; } @@ -374,7 +376,7 @@ static void tusb_allow_idle(struct musb *musb, u32 wakeup_enables) reg |= TUSB_PRCM_MNGMT_PM_IDLE | TUSB_PRCM_MNGMT_DEV_IDLE; musb_writel(tbase, TUSB_PRCM_MNGMT, reg); - DBG(6, "idle, wake on %02x\n", wakeup_enables); + dev_dbg(musb->controller, "idle, wake on %02x\n", wakeup_enables); } /* @@ -421,8 +423,8 @@ static void musb_do_idle(unsigned long _musb) if ((musb->a_wait_bcon != 0) && (musb->idle_timeout == 0 || time_after(jiffies, musb->idle_timeout))) { - DBG(4, "Nothing connected %s, turning off VBUS\n", - otg_state_string(musb)); + dev_dbg(musb->controller, "Nothing connected %s, turning off VBUS\n", + otg_state_string(musb->xceiv->state)); } /* FALLTHROUGH */ case OTG_STATE_A_IDLE: @@ -481,7 +483,8 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout) /* Never idle if active, or when VBUS timeout is not set as host */ if (musb->is_active || ((musb->a_wait_bcon == 0) && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { - DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); + dev_dbg(musb->controller, "%s active, deleting timer\n", + otg_state_string(musb->xceiv->state)); del_timer(&musb_idle_timer); last_timer = jiffies; return; @@ -491,14 +494,14 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout) if (!timer_pending(&musb_idle_timer)) last_timer = timeout; else { - DBG(4, "Longer idle timer already pending, ignoring\n"); + dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n"); return; } } last_timer = timeout; - DBG(4, "%s inactive, for idle timer for %lu ms\n", - otg_state_string(musb), + dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n", + otg_state_string(musb->xceiv->state), (unsigned long)jiffies_to_msecs(timeout - jiffies)); mod_timer(&musb_idle_timer, timeout); } @@ -572,8 +575,8 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on) musb_writel(tbase, TUSB_DEV_CONF, conf); musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); - DBG(1, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n", - otg_state_string(musb), + dev_dbg(musb->controller, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n", + otg_state_string(musb->xceiv->state), musb_readb(musb->mregs, MUSB_DEVCTL), musb_readl(tbase, TUSB_DEV_OTG_STAT), conf, prcm); @@ -633,7 +636,7 @@ static int tusb_musb_set_mode(struct musb *musb, u8 musb_mode) #endif default: - DBG(2, "Trying to set mode %i\n", musb_mode); + dev_dbg(musb->controller, "Trying to set mode %i\n", musb_mode); return -EINVAL; } @@ -666,7 +669,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase) default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS); else default_a = is_host_enabled(musb); - DBG(2, "Default-%c\n", default_a ? 'A' : 'B'); + dev_dbg(musb->controller, "Default-%c\n", default_a ? 'A' : 'B'); musb->xceiv->default_a = default_a; tusb_musb_set_vbus(musb, default_a); @@ -693,7 +696,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase) #endif if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) { - DBG(1, "Forcing disconnect (no interrupt)\n"); + dev_dbg(musb->controller, "Forcing disconnect (no interrupt)\n"); if (musb->xceiv->state != OTG_STATE_B_IDLE) { /* INTR_DISCONNECT can hide... */ musb->xceiv->state = OTG_STATE_B_IDLE; @@ -701,18 +704,18 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase) } musb->is_active = 0; } - DBG(2, "vbus change, %s, otg %03x\n", - otg_state_string(musb), otg_stat); + dev_dbg(musb->controller, "vbus change, %s, otg %03x\n", + otg_state_string(musb->xceiv->state), otg_stat); idle_timeout = jiffies + (1 * HZ); schedule_work(&musb->irq_work); } else /* A-dev state machine */ { - DBG(2, "vbus change, %s, otg %03x\n", - otg_state_string(musb), otg_stat); + dev_dbg(musb->controller, "vbus change, %s, otg %03x\n", + otg_state_string(musb->xceiv->state), otg_stat); switch (musb->xceiv->state) { case OTG_STATE_A_IDLE: - DBG(2, "Got SRP, turning on VBUS\n"); + dev_dbg(musb->controller, "Got SRP, turning on VBUS\n"); musb_platform_set_vbus(musb, 1); /* CONNECT can wake if a_wait_bcon is set */ @@ -756,7 +759,8 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase) if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) { u8 devctl; - DBG(4, "%s timer, %03x\n", otg_state_string(musb), otg_stat); + dev_dbg(musb->controller, "%s timer, %03x\n", + otg_state_string(musb->xceiv->state), otg_stat); switch (musb->xceiv->state) { case OTG_STATE_A_WAIT_VRISE: @@ -767,7 +771,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase) if (otg_stat & TUSB_DEV_OTG_STAT_VBUS_VALID) { if ((devctl & MUSB_DEVCTL_VBUS) != MUSB_DEVCTL_VBUS) { - DBG(2, "devctl %02x\n", devctl); + dev_dbg(musb->controller, "devctl %02x\n", devctl); break; } musb->xceiv->state = OTG_STATE_A_WAIT_BCON; @@ -812,7 +816,7 @@ static irqreturn_t tusb_musb_interrupt(int irq, void *__hci) musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); int_src = musb_readl(tbase, TUSB_INT_SRC) & ~TUSB_INT_SRC_RESERVED_BITS; - DBG(3, "TUSB IRQ %08x\n", int_src); + dev_dbg(musb->controller, "TUSB IRQ %08x\n", int_src); musb->int_usb = (u8) int_src; @@ -833,7 +837,7 @@ static irqreturn_t tusb_musb_interrupt(int irq, void *__hci) reg = musb_readl(tbase, TUSB_SCRATCH_PAD); if (reg == i) break; - DBG(6, "TUSB NOR not ready\n"); + dev_dbg(musb->controller, "TUSB NOR not ready\n"); } /* work around issue 13 (2nd half) */ @@ -845,7 +849,7 @@ static irqreturn_t tusb_musb_interrupt(int irq, void *__hci) musb->is_active = 1; schedule_work(&musb->irq_work); } - DBG(3, "wake %sactive %02x\n", + dev_dbg(musb->controller, "wake %sactive %02x\n", musb->is_active ? "" : "in", reg); /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */ @@ -867,7 +871,7 @@ static irqreturn_t tusb_musb_interrupt(int irq, void *__hci) u32 dma_src = musb_readl(tbase, TUSB_DMA_INT_SRC); u32 real_dma_src = musb_readl(tbase, TUSB_DMA_INT_MASK); - DBG(3, "DMA IRQ %08x\n", dma_src); + dev_dbg(musb->controller, "DMA IRQ %08x\n", dma_src); real_dma_src = ~real_dma_src & dma_src; if (tusb_dma_omap() && real_dma_src) { int tx_source = (real_dma_src & 0xffff); @@ -875,7 +879,7 @@ static irqreturn_t tusb_musb_interrupt(int irq, void *__hci) for (i = 1; i <= 15; i++) { if (tx_source & (1 << i)) { - DBG(3, "completing ep%i %s\n", i, "tx"); + dev_dbg(musb->controller, "completing ep%i %s\n", i, "tx"); musb_dma_completion(musb, i, 1); } } |