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* Merge 3.0.75Pawit Pornkitprasan2013-04-291-0/+1
|\ | | | | | | Change-Id: Iefad0afd76773f4a9556775cd0fa8dcacb135cdf
| * signal: Define __ARCH_HAS_SA_RESTORER so we know whether to clear sa_restorerBen Hutchings2013-04-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Vaguely based on upstream commit 574c4866e33d 'consolidate kernel-side struct sigaction declarations'. flush_signal_handlers() needs to know whether sigaction::sa_restorer is defined, not whether SA_RESTORER is defined. Define the __ARCH_HAS_SA_RESTORER macro to indicate this. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge 3.0.60Pawit Pornkitprasan2013-01-222-7/+8
|\ \ | |/ | | | | Change-Id: I00b211aba537823b54ad68971ebb9032a6bf78f7
| * ARM: 7566/1: vfp: fix save and restore when running on pre-VFPv3 and ↵Paul Walmsley2012-12-172-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_VFPv3 set commit 39141ddfb63a664f26d3f42f64ee386e879b492c upstream. After commit 846a136881b8f73c1f74250bf6acfaa309cab1f2 ("ARM: vfp: fix saving d16-d31 vfp registers on v6+ kernels"), the OMAP 2430SDP board started crashing during boot with omap2plus_defconfig: [ 3.875122] mmcblk0: mmc0:e624 SD04G 3.69 GiB [ 3.915954] mmcblk0: p1 [ 4.086639] Internal error: Oops - undefined instruction: 0 [#1] SMP ARM [ 4.093719] Modules linked in: [ 4.096954] CPU: 0 Not tainted (3.6.0-02232-g759e00b #570) [ 4.103149] PC is at vfp_reload_hw+0x1c/0x44 [ 4.107666] LR is at __und_usr_fault_32+0x0/0x8 It turns out that the context save/restore fix unmasked a latent bug in commit 5aaf254409f8d58229107b59507a8235b715a960 ("ARM: 6203/1: Make VFPv3 usable on ARMv6"). When CONFIG_VFPv3 is set, but the kernel is booted on a pre-VFPv3 core, the code attempts to save and restore the d16-d31 VFP registers. These are only present on non-D16 VFPv3+, so this results in an undefined instruction exception. The code didn't crash before commit 846a136 because the save and restore code was only touching d0-d15, present on all VFP. Fix by implementing a request from Russell King to add a new HWCAP flag that affirmatively indicates the presence of the d16-d31 registers: http://marc.info/?l=linux-arm-kernel&m=135013547905283&w=2 and some feedback from Måns to clarify the name of the HWCAP flag. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Dave Martin <dave.martin@linaro.org> Cc: Måns Rullgård <mans.rullgard@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge 3.0.52Pawit Pornkitprasan2012-11-204-138/+33
|\ \ | |/ | | | | | | | | | | | | | | | | Merge branch 'linux-3.0.y' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into jellybean-next Conflicts: drivers/net/tun.c kernel/time/timekeeping.c Change-Id: Iba7fc59ca05114d9e7bade8dfc5bb45229ebf075
| * ARM: vfp: fix saving d16-d31 vfp registers on v6+ kernelsRussell King2012-10-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 846a136881b8f73c1f74250bf6acfaa309cab1f2 upstream. Michael Olbrich reported that his test program fails when built with -O2 -mcpu=cortex-a8 -mfpu=neon, and a kernel which supports v6 and v7 CPUs: volatile int x = 2; volatile int64_t y = 2; int main() { volatile int a = 0; volatile int64_t b = 0; while (1) { a = (a + x) % (1 << 30); b = (b + y) % (1 << 30); assert(a == b); } } and two instances are run. When built for just v7 CPUs, this program works fine. It uses the "vadd.i64 d19, d18, d16" VFP instruction. It appears that we do not save the high-16 double VFP registers across context switches when the kernel is built for v6 CPUs. Fix that. Tested-By: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * ARM: 7467/1: mutex: use generic xchg-based implementation for ARMv6+Will Deacon2012-10-021-115/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit a76d7bd96d65fa5119adba97e1b58d95f2e78829 upstream. The open-coded mutex implementation for ARMv6+ cores suffers from a severe lack of barriers, so in the uncontended case we don't actually protect any accesses performed during the critical section. Furthermore, the code is largely a duplication of the ARMv6+ atomic_dec code but optimised to remove a branch instruction, as the mutex fastpath was previously inlined. Now that this is executed out-of-line, we can reuse the atomic access code for the locking (in fact, we use the xchg code as this produces shorter critical sections). This patch uses the generic xchg based implementation for mutexes on ARMv6+, which introduces barriers to the lock/unlock operations and also has the benefit of removing a fair amount of inline assembly code. Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Nicolas Pitre <nico@linaro.org> Reported-by: Shan Kang <kangshan0910@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * ARM: 7488/1: mm: use 5 bits for swapfile type encodingWill Deacon2012-09-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit f5f2025ef3e2cdb593707cbf87378761f17befbe upstream. Page migration encodes the pfn in the offset field of a swp_entry_t. For LPAE, we support physical addresses of up to 36 bits (due to sparsemem limitations with the size of page flags), requiring 24 bits to represent a pfn. A further 3 bits are used to encode a swp_entry into a pte, leaving 5 bits for the type field. Furthermore, the core code defines MAX_SWAPFILES_SHIFT as 5, so the additional type bit does not get used. This patch reduces the width of the type field to 5 bits, allowing us to create up to 31 swapfiles of 64GB each. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * ARM: 7487/1: mm: avoid setting nG bit for user mappings that aren't presentWill Deacon2012-09-141-16/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 47f1204329237a0f8655f5a9f14a38ac81946ca1 upstream. Swap entries are encoding in ptes such that !pte_present(pte) and pte_file(pte). The remaining bits of the descriptor are used to identify the swapfile and offset within it to the swap entry. When writing such a pte for a user virtual address, set_pte_at unconditionally sets the nG bit, which (in the case of LPAE) will corrupt the swapfile offset and lead to a BUG: [ 140.494067] swap_free: Unused swap offset entry 000763b4 [ 140.509989] BUG: Bad page map in process rs:main Q:Reg pte:0ec76800 pmd:8f92e003 This patch fixes the problem by only setting the nG bit for user mappings that are actually present. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * ARM: 7479/1: mm: avoid NULL dereference when flushing gate_vma with VIVT cachesWill Deacon2012-08-151-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit b74253f78400f9a4b42da84bb1de7540b88ce7c4 upstream. The vivt_flush_cache_{range,page} functions check that the mm_struct of the VMA being flushed has been active on the current CPU before performing the cache maintenance. The gate_vma has a NULL mm_struct pointer and, as such, will cause a kernel fault if we try to flush it with the above operations. This happens during ELF core dumps, which include the gate_vma as it may be useful for debugging purposes. This patch adds checks to the VIVT cache flushing functions so that VMAs with a NULL mm_struct are flushed unconditionally (the vectors page may be dirty if we use it to store the current TLS pointer). Reported-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Tested-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * ARM: 7365/1: drop unused parameter from flush_cache_user_rangeDima Zavin2012-06-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 4542b6a0fa6b48d9ae6b41c1efeb618b7a221b2a upstream. vma isn't used and flush_cache_user_range isn't a standard macro that is used on several archs with the same prototype. In fact only unicore32 has a macro with the same name (with an identical implementation and no in-tree users). This is a part of a patch proposed by Dima Zavin (with Message-id: 1272439931-12795-1-git-send-email-dima@android.com) that didn't get accepted. Cc: Dima Zavin <dima@android.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge remote-tracking branch 'common/android-3.0' into ↵JP Abgrall2012-05-081-0/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | android-samsung-30-wip-mergedown * common/android-3.0: (49 commits) Linux 3.0.31 hfsplus: Fix potential buffer overflows sched: Fix nohz load accounting -- again! wl1251: fix crash on remove due to leftover work item wl1251: fix crash on remove due to premature kfree rtlwifi: Fix oops on unload mac80211: fix AP mode EAP tx for VLAN stations ipw2200: Fix race condition in the command completion acknowledge i2c: pnx: Disable clk in suspend libata: skip old error history when counting probe trials hwmon: (coretemp) fix oops on cpu unplug hwmon: (coretemp) Increase CPU core limit efivars: Improve variable validation efi: Validate UEFI boot variables efivars: fix warnings when CONFIG_PSTORE=n efivars: String functions efi: Add new variable attributes SCSI: libsas: fix false positive 'device attached' conditions SCSI: libsas: fix sas_find_bcast_phy() in the presence of 'vacant' phys ARM: 7403/1: tls: remove covert channel via TPIDRURW ...
| * \ Merge commit 'v3.0.31' into android-3.0Todd Poynor2012-05-081-0/+4
| |\ \ | | |/
| | * ARM: 7403/1: tls: remove covert channel via TPIDRURWWill Deacon2012-05-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 6a1c53124aa161eb624ce7b1e40ade728186d34c upstream. TPIDRURW is a user read/write register forming part of the group of thread registers in more recent versions of the ARM architecture (~v6+). Currently, the kernel does not touch this register, which allows tasks to communicate covertly by reading and writing to the register without context-switching affecting its contents. This patch clears TPIDRURW when TPIDRURO is updated via the set_tls macro, which is called directly from __switch_to. Since the current behaviour makes the register useless to userspace as far as thread pointers are concerned, simply clearing the register (rather than saving and restoring it) will not cause any problems to userspace. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge remote-tracking branch 'common/android-3.0' into ↵JP Abgrall2012-04-241-0/+5
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | android-samsung-30-wip-mergedown * common/android-3.0: (1178 commits) cpufreq: interactive: remove unused target_validate_time_in_idle cpufreq: interactive: Boost frequency on touchscreen input cpufreq: Separate speed target revalidate time and initial set time cpufreq: interactive: based hispeed bump on target freq, not actual cpufreq: interactive: adjust code and documentation to match cpufreq: interactive: configurable delay before raising above hispeed sync: add poll support sw_sync: add fill_driver_data support sync: add ioctl to get fence data sw_sync: add debug support sync: add debugfs support sync: add timestamps to sync_pts sw_sync: add cpu based sync driver sync: Add synchronization framework Linux 3.0.28 Bluetooth: Fix l2cap conn failures for ssp devices TOMOYO: Fix mount flags checking order. iommu/amd: Make sure IOMMU interrupts are re-enabled on resume cred: copy_process() should clear child->replacement_session_keyring ASoC: ak4642: fixup: mute needs +1 step ... Conflicts: mm/compaction.c Change-Id: I3dc59225d2435eddbed0c639155179e580891ac8 Signed-off-by: JP Abgrall <jpa@google.com>
| * | Merge linux-stable 3.0.28 into android-3.0Todd Poynor2012-04-191-0/+5
| |\ \ | | |/ | | | | | | | | | Change-Id: Iee820738e53627f5d0447a87ceff34443aa72786 Signed-off-by: Todd Poynor <toddpoynor@google.com>
| | * ARM: 7325/1: fix v7 boot with lockdep enabledRabin Vincent2012-02-291-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 8e43a905dd574f54c5715d978318290ceafbe275 upstream. Bootup with lockdep enabled has been broken on v7 since b46c0f74657d ("ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR"). This is because v7_setup (which is called very early during boot) calls v7_flush_dcache_all, and the save_and_disable_irqs added by that patch ends up attempting to call into lockdep C code (trace_hardirqs_off()) when we are in no position to execute it (no stack, MMU off). Fix this by using a notrace variant of save_and_disable_irqs. The code already uses the notrace variant of restore_irqs. Reviewed-by: Nicolas Pitre <nico@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | ARM: VIC: Add vic_set_fiq function to select if an interrupt should generate ↵Arve Hjønnevåg2011-11-171-0/+1
|/ / | | | | | | | | | | | | an IRQ or FIQ Change-Id: I1ac9b992b7fe31d392578334d47227363bcac685 Signed-off-by: Arve Hjønnevåg <arve@android.com>
* | Merge commit 'v3.0.8' into android-3.0Colin Cross2011-10-272-18/+18
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| * ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_opWill Deacon2011-10-031-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit df77abcafc8dc881b6c9347548651777088e4b27 upstream. The SMP implementation of __futex_atomic_op clobbers oldval with the status flag from the exclusive store. This causes it to always read as zero when performing the FUTEX_OP_CMP_* operation. This patch updates the ARM __futex_atomic_op implementations to take a tmp argument, allowing us to store the strex status flag without overwriting the register containing oldval. Reported-by: Minho Ban <mhban@samsung.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.Srinivas Kandagatla2011-10-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 43c734be5571a4daad9f0a3e0b3229a1c0049917 upstream. This patch fixes L2 Cache size calculations for L2C-210, L2C-310 and PL310, by changing the L2X0_AUX_CTRL_WAY_SIZE_MASK from 2 bits to 3 bits. The Auxiliary Control Register for L2C-210, L2C-310 and PL310 has 3bits [19:17] for Way size, however the existing code only uses 2 bits to get this value. This results in incorrect cachesize calculations. It also results in performing operations on the whole cache when we erroneously decide that the range is big enough (due to l2x0_size being too small) and also prints incorrect cachesize. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | ARM: common: fiq_debugger: add suspend/resume handlersDima Zavin2011-10-251-0/+9
| | | | | | | | | | Change-Id: If6eb75059fdf4867eb9a974d60b9d50e5e3350d4 Signed-off-by: Dima Zavin <dima@android.com>
* | ARM: common: fiq_debugger: add uart_enable/disable platform callbacksDima Zavin2011-10-251-0/+9
| | | | | | | | | | | | | | | | | | This allows the platform specific drivers to properly enable and disable the uart at the appropriate times. On some platforms, just managing the clock is not enough. Change-Id: I5feaab04cfe313a4a9470ca274838676b9684201 Signed-off-by: Dima Zavin <dima@android.com>
* | ARM: smp: implement arch_trigger_all_cpus_backtrace using IPIDima Zavin2011-10-203-1/+6
| | | | | | | | | | | | | | | | | | | | | | Based on a rough patch by frank.rowand@am.sony.com Since ARM doesn't have an NMI (fiq's are not always available), send an IPI to all other CPUs (current cpu prints the stack directly) to capture a backtrace. Change-Id: I8b163c8cec05d521b433ae133795865e8a33d4e2 Signed-off-by: Dima Zavin <dima@android.com>
* | ARM: cache-l2x0: update workaround for PL310 errata 727915Colin Cross2011-09-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM errata 727915 for PL310 has been updated to include a new workaround required for PL310 r2p0 for l2x0_flush_all, which also affects l2x0_clean_all in my testing. For r2p0, clean or flush each set/way individually. For r3p0 or greater, use the debug register for cleaning and flushing. Requires exporting the cache_id, sets and ways detected in the init function for later use. Change-Id: I215055cbe5dc7e4e8184fb2befc4aff672ef0a12 Signed-off-by: Colin Cross <ccross@android.com>
* | Merge commit 'v3.0-rc5' into android-3.0Colin Cross2011-06-292-0/+6
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| * ARM: 6959/1: SMP build fix for entry-macro-multi.SMagnus Damm2011-06-172-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The assembly code in entry-macro-multi.S does not build without the include asm/assembler.h in the case of CONFIG_SMP=y. Fixes the rather theoretical SMP build of mach-shmobile/entry-intc.c: arch/arm/include/asm/entry-macro-multi.S: Assembler messages: arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_smp(test_for_ipi r0,r6,r5,lr)' arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_up_b(9997f)' make[1]: *** [arch/arm/mach-shmobile/entry-intc.o] Error 1 make: *** [arch/arm/mach-shmobile] Error 2 make: *** Waiting for unfinished jobs.... Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: etm: Support multiple ETMs/PTMs.Arve Hjønnevåg2011-06-141-6/+10
| | | | | | | | | | | | | | | | | | If more than one ETM or PTM are present, configure all of them and enable the formatter in the ETB. This allows tracing on dual core systems (e.g. omap4). Change-Id: I028657d5cf2bee1b23f193d4387b607953b35888 Signed-off-by: Arve Hjønnevåg <arve@android.com>
* | ARM: etm: Configure data tracingArve Hjønnevåg2011-06-141-1/+9
| | | | | | | | | | | | | | | | | | | | The old code enabled data tracing, but did not configure the range. We now configure it to trace all data addresses by default, and add a trace_data_range attribute to change the range or disable data tracing. Change-Id: I9d04e3e1ea0d0b4d4d5bcb93b1b042938ad738b2 Signed-off-by: Arve Hjønnevåg <arve@android.com>
* | ARM: Add 'card_present' state to mmc_platfrom_dataDmitry Shmidt2011-06-141-0/+1
| | | | | | | | Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
* | Recreate asm/mach/mmc.h include fileColin Cross2011-06-141-0/+27
| | | | | | | | | | Change-Id: I9f10244b0603f7842b8504a16124d40dc4a71ed2 Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: Add generic fiq serial debuggerIliyan Malchev2011-06-141-0/+46
| | | | | | | | | | | | Change-Id: Ibb536c88f0dbaf4766d0599296907e35e42cbfd6 Signed-off-by: Iliyan Malchev <malchev@google.com> Signed-off-by: Arve Hjønnevåg <arve@android.com>
* | ARM: Add fiq_glueArve Hjønnevåg2011-06-141-0/+30
| | | | | | | | | | | | Change-Id: I27d2554e07d9de204e0a06696d38db51608d9f6b Signed-off-by: Arve Hjønnevåg <arve@android.com> Signed-off-by: Colin Cross <ccross@android.com>
* | [ARM] Do not call flush_cache_user_range with mmap_sem heldDima Zavin2011-06-141-1/+1
|/ | | | | | | | | | | | | | | | | We can't be holding the mmap_sem while calling flush_cache_user_range because the flush can fault. If we fault on a user address, the page fault handler will try to take mmap_sem again. Since both places acquire the read lock, most of the time it succeeds. However, if another thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in between the call to flush_cache_user_range and the fault, the down_read in do_page_fault will deadlock. Also, since we really can't be holding the mmap_sem while calling flush_cache_user_range AND vma is actually unused by the flush itself, get rid of vma as an argument. Change-Id: If55409bde41ad1060fa4fe7cbd4ac530d4d9a106 Signed-off-by: Dima Zavin <dima@android.com>
* Merge branch 'setns'Linus Torvalds2011-05-281-0/+1
|\ | | | | | | | | | | | | | | * setns: ns: Wire up the setns system call Done as a merge to make it easier to fix up conflicts in arm due to addition of sendmmsg system call
| * ns: Wire up the setns system callEric W. Biederman2011-05-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 32bit and 64bit on x86 are tested and working. The rest I have looked at closely and I can't find any problems. setns is an easy system call to wire up. It just takes two ints so I don't expect any weird architecture porting problems. While doing this I have noticed that we have some architectures that are very slow to get new system calls. cris seems to be the slowest where the last system calls wired up were preadv and pwritev. avr32 is weird in that recvmmsg was wired up but never declared in unistd.h. frv is behind with perf_event_open being the last syscall wired up. On h8300 the last system call wired up was epoll_wait. On m32r the last system call wired up was fallocate. mn10300 has recvmmsg as the last system call wired up. The rest seem to at least have syncfs wired up which was new in the 2.6.39. v2: Most of the architecture support added by Daniel Lezcano <dlezcano@fr.ibm.com> v3: ported to v2.6.36-rc4 by: Eric W. Biederman <ebiederm@xmission.com> v4: Moved wiring up of the system call to another patch v5: ported to v2.6.39-rc6 v6: rebased onto parisc-next and net-next to avoid syscall conflicts. v7: ported to Linus's latest post 2.6.39 tree. >  arch/blackfin/include/asm/unistd.h     |    3 ++- >  arch/blackfin/mach-common/entry.S      |    1 + Acked-by: Mike Frysinger <vapier@gentoo.org> Oh - ia64 wiring looks good. Acked-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-05-277-3/+74
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits) ARM: 6945/1: Add unwinding support for division functions ARM: kill pmd_off() ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks ARM: 6943/1: mm: use TTBR1 instead of reserved context ID ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7 ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area ARM: add sendmmsg syscall ARM: 6863/1: allow hotplug on msm ARM: 6832/1: mmci: support for ST-Ericsson db8500v2 ARM: 6830/1: mach-ux500: force PrimeCell revisions ARM: 6829/1: amba: make hardcoded periphid override hardware ARM: 6828/1: mach-ux500: delete SSP PrimeCell ID ARM: 6827/1: mach-netx: delete hardcoded periphid ARM: 6940/1: fiq: Briefly document driver responsibilities for suspend/resume ARM: 6938/1: fiq: Refactor {get,set}_fiq_regs() for Thumb-2 ARM: 6914/1: sparsemem: fix highmem detection when using SPARSEMEM ARM: 6913/1: sparsemem: allow pfn_valid to be overridden when using SPARSEMEM at91: drop at572d940hf support at91rm9200: introduce at91rm9200_set_type to specficy cpu package at91: drop boot_params and PLAT_PHYS_OFFSET ...
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| *-. \ Merge branches 'devel', 'devel-stable' and 'fixes' into for-linusRussell King2011-05-276-1/+53
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| | | * | ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7Catalin Marinas2011-05-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes TTBR1 point to swapper_pg_dir so that global, kernel mappings can be used exclusively on v6 and v7 cores where they are needed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | ARM: add sendmmsg syscallRussell King2011-05-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 228e548e (net: Add sendmmsg socket system call) added the new sendmmsg syscall. Add this to the syscall table for ARM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | ARM: 6913/1: sparsemem: allow pfn_valid to be overridden when using SPARSEMEMWill Deacon2011-05-261-1/+1
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit eb33575c ("[ARM] Double check memmap is actually valid with a memmap has unexpected holes V2"), a new function, memmap_valid_within, was introduced to mmzone.h so that holes in the memmap which pass pfn_valid in SPARSEMEM configurations can be detected and avoided. The fix to this problem checks that the pfn <-> page linkages are correct by calculating the page for the pfn and then checking that page_to_pfn on that page returns the original pfn. Unfortunately, in SPARSEMEM configurations, this results in reading from the page flags to determine the correct section. Since the memmap here has been freed, junk is read from memory and the check is no longer robust. In the best case, reading from /proc/pagetypeinfo will give you the wrong answer. In the worst case, you get SEGVs, Kernel OOPses and hung CPUs. Furthermore, ioremap implementations that use pfn_valid to disallow the remapping of normal memory will break. This patch allows architectures to provide their own pfn_valid function instead of using the default implementation used by sparsemem. The architecture-specific version is aware of the memmap state and will return false when passed a pfn for a freed page within a valid section. Acked-by: Mel Gorman <mgorman@suse.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | Merge branch 'devicetree/arm-next' of git://git.secretlab.ca/git/linux-2.6 ↵Russell King2011-05-253-0/+50
| | |\ \ | | | | | | | | | | | | | | | into devel-stable
| | | * | arm/dt: probe for platforms via the device treeGrant Likely2011-05-233-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a dtb is passed to the kernel then the kernel needs to iterate through compiled-in mdescs looking for one that matches and move the dtb data to a safe location before it gets accidentally overwritten by the kernel. This patch creates a new function, setup_machine_fdt() which is analogous to the setup_machine_atags() created in the previous patch. It does all the early setup needed to use a device tree machine description. v5: - Print warning with neither dtb nor atags are passed to the kernel - Fix bug in setting of __machine_arch_type to the selected machine, not just the last machine in the list. Reported-by: Tixy <tixy@yxit.co.uk> - Copy command line directly into boot_command_line instead of cmd_line v4: - Dump some output when a matching machine_desc cannot be found v3: - Added processing of reserved list. - Backed out the v2 change that copied instead of reserved the dtb. dtb is reserved again and the real problem was fixed by using alloc_bootmem_align() for early allocation of RAM for unflattening the tree. - Moved cmd_line and initrd changes to earlier patch to make series bisectable. v2: Changed to save the dtb by copying into an allocated buffer. - Since the dtb will very likely be passed in the first 16k of ram where the interrupt vectors live, memblock_reserve() is insufficient to protect the dtb data. [based on work originally written by Jeremy Kerr <jeremy.kerr@canonical.com>] Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | | * | arm/dt: consolidate atags setup into setup_machine_atagsGrant Likely2011-05-231-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding device tree support, this patch consolidates all of the atag-specific setup into a single function. v5: - drop double printk("Machine; %s\n", ...); call. - leave copying boot_command_line in setup_arch() since it isn't atags specific. v4: - adapt to the removal of lookup_machine_type() - break out dump of machine_desc table into dump_machine_table() because the device tree probe code will use it. - Add for_each_machine_desc() macro Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | | * | arm/dt: Allow CONFIG_OF on ARMGrant Likely2011-05-112-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some basic empty infrastructure for DT support on ARM. v5: - Fix off-by-one error in size calculation of initrd - Stop mucking with cmd_line, and load command line from dt into boot_command_line instead which matches the behaviour of ATAGS booting v3: - moved cmd_line export and initrd setup to this patch to make the series bisectable. - switched to alloc_bootmem_align() for allocation when unflattening the device tree. memblock_alloc() was not the right interface. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | ARM: 6940/1: fiq: Briefly document driver responsibilities for suspend/resumeDave Martin2011-05-261-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers which make use of the FIQ interrupt may require the state of the FIQ mode registers to be preserved across suspend/resume. Because the FIQ mode registers are not saved and restored automatically by the kernel, driver authors will need to do the appropriate save/restore in their own driver suspend/resume handlers. Implementing global automatic save/restore of the FIQ state does not appear appropriate, since this by itself is not sufficient for FIQ-based drivers to function correctly across suspend/resume in any case. This patch adds a brief explanatory note to fiq.h documenting the requirement placed on driver authors. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6938/1: fiq: Refactor {get,set}_fiq_regs() for Thumb-2Dave Martin2011-05-261-2/+14
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * To remove the risk of inconvenient register allocation decisions by the compiler, these functions are separated out as pure assembler. * The apcs frame manipulation code is not applicable for Thumb-2 (and also not easily compatible). Since it's not essential to have a full frame on these leaf assembler functions, the frame manipulation is removed, in the interests of simplicity. * Split up ldm/stm instructions to be compatible with Thumb-2, as well as avoiding instruction forms deprecated on >= ARMv7. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | arm: use asm-generic/bitops/le.hAkinobu Mita2011-05-261-38/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous style change enables to use asm-generic/bitops/le.h on arm. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | arch: add #define for each of optimized find bitopsAkinobu Mita2011-05-261-0/+3
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The style that we normally use in asm-generic is to test the macro itself for existence, so in asm-generic, do: #ifndef find_next_zero_bit_le extern unsigned long find_next_zero_bit_le(const void *addr, unsigned long size, unsigned long offset); #endif and in the architectures, write static inline unsigned long find_next_zero_bit_le(const void *addr, unsigned long size, unsigned long offset) #define find_next_zero_bit_le find_next_zero_bit_le This adds the #define for each of the optimized find bitops in the architectures. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Remove unused PROC_CHANGE_PENALTY constantStephen Boyd2011-05-251-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This constant hasn't been used since before the git era (2.6.12) and thus can be dropped. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Richard Weinberger <richard@nod.at> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Matt Turner <mattst88@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
generated by cgit v1.1 at 2025-01-14 00:48:34 +0000