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* ARM: orion: Fix Orion5x GPIO regression from MPP cleanupAndrew Lunn2012-03-121-113/+113
| | | | | | | | | | | | | | | | | | | | | | | | | commit b06540371063f0f07aafc1d1ac5e974da85c973c upstream. Patchset "ARM: orion: Refactor the MPP code common in the orion platform" broke at least Orion5x based platforms. These platforms have pins configured as GPIO when the selector is not 0x0. However the common code assumes the selector is always 0x0 for a GPIO lines. It then ignores the GPIO bits in the MPP definitions, resulting in that Orion5x machines cannot correctly configure there GPIO lines. The Fix removes the assumption that the selector is always 0x0. In order that none GPIO configurations are correctly blocked, Kirkwood and mv78xx0 MPP definitions are corrected to only set the GPIO bits for GPIO configurations. This third version, which does not contain any whitespace changes, and is rebased on v3.3-rc2. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: orion: Fix USB phy for orion5x.Andrew Lunn2012-03-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | commit 72053353583230952c4b187e110e9da00dfc3afb upstream. The patch "ARM: orion: Consolidate USB platform setup code.", commit 4fcd3f374a928081d391cd9a570afe3b2c692fdc broke USB on TS-7800 and other orion5x boards, because the wrong type of PHY was being passed to the EHCI driver in the platform data. Orion5x needs EHCI_PHY_ORION and all the others want EHCI_PHY_NA. Allow the mach- code to tell the generic plat-orion code which USB PHY enum to place into the platform data. Version 2: Rebase to v3.3-rc2. Reported-by: Ambroz Bizjak <ambrop7@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Ambroz Bizjak <ambrop7@gmail.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM: orion: Refactor the MPP code common in the orion platformAndrew Lunn2011-05-162-61/+3
| | | | | | | | | | mv78xx0 and kirkwood use identical mpp code. It should also be possible to rewrite the orion5x mpp to use this platform code. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate SATA platform setup.Andrew Lunn2011-05-161-27/+2
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate USB platform setup code.Andrew Lunn2011-05-161-87/+6
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate I2C initialization.Andrew Lunn2011-05-161-67/+3
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate ethernet platform dataAndrew Lunn2011-05-161-206/+12
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate the creation of the uart platform data.Andrew Lunn2011-05-161-150/+10
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Rename some constants to macros to make code more identicalAndrew Lunn2011-05-161-19/+19
| | | | | | | | Changing eg 0xffffffff to DMA_BIT_MASK(32) etc allows easier side by side comparision of identical code which can be consolidated. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* arm: Cleanup the irq namespaceThomas Gleixner2011-03-291-4/+4
| | | | | | Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-03-1710-55/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (289 commits) davinci: DM644x EVM: register MUSB device earlier davinci: add spi devices on tnetv107x evm davinci: add ssp config for tnetv107x evm board davinci: add tnetv107x ssp platform device spi: add ti-ssp spi master driver mfd: add driver for sequencer serial port ARM: EXYNOS4: Implement Clock gating for System MMU ARM: EXYNOS4: Enhancement of System MMU driver ARM: EXYNOS4: Add support for gpio interrupts ARM: S5P: Add function to register gpio interrupt bank data ARM: S5P: Cleanup S5P gpio interrupt code ARM: EXYNOS4: Add missing GPYx banks ARM: S3C64XX: Fix section mismatch from cpufreq init ARM: EXYNOS4: Add keypad device to the SMDKV310 ARM: EXYNOS4: Update clocks for keypad ARM: EXYNOS4: Update keypad base address ARM: EXYNOS4: Add keypad device helpers ARM: EXYNOS4: Add support for SATA on ARMLEX4210 plat-nomadik: make GPIO interrupts work with cpuidle ApSleep mach-u300: define a dummy filter function for coh901318 ... Fix up various conflicts in - arch/arm/mach-exynos4/cpufreq.c - arch/arm/mach-mxs/gpio.c - drivers/net/Kconfig - drivers/tty/serial/Kconfig - drivers/tty/serial/Makefile - drivers/usb/gadget/fsl_mxc_udc.c - drivers/video/Kconfig
| * ARM: Remove dependency of plat-orion GPIO code on mach directory includes.Lennert Buytenhek2011-03-034-50/+7
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes the various mach dirs that use the plat-orion GPIO code pass in GPIO-related platform info (GPIO controller base address, secondary base IRQ number, etc) explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| * ARM: Remove dependency of plat-orion time code on mach directory includes.Lennert Buytenhek2011-03-036-5/+11
| | | | | | | | | | | | | | | | | | | | | | This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* | ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King2011-02-171-1/+1
|/ | | | | | | | | | | | | | | | | This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mv78xx: wrong cpu1 window base register addressEvgeniy Dushistov2010-11-291-1/+1
| | | | | | | | | | | | | | | | | The constant DDR_WINDOW_CPU1_BASE has wrong value. Because of that mv78xx0_mbus_dram_info is not filled properly on start, and in its turn drivers, that used mv78xx0_mbus_dram_info, in my case mv643xx_eth.c, not work on second core. According to MV76100, MV78100, and MV78200 DiscoveryTM Innovation Series CPU Family Functional Specifications address should be 0x1570. Signed-off-by: Evgeniy Dushistov <dushistov@mail.ru> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orionRussell King2010-11-071-3/+1
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| * ARM: orion5x/kirkwood/mv78xx0: fix MPP configuration corner casesMike Rapoport2010-11-051-3/+1
| | | | | | | | | | | | | | | | Wrong MPP configuration would cause <cpu>_mpp_conf loop infinitely because the mpp list iterator would not be incremented. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* | arm: remove machine_desc.io_pg_offst and .phys_ioNicolas Pitre2010-10-203-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
* | arm: return both physical and virtual addresses from addruartJeremy Kerr2010-10-201-6/+5
|/ | | | | | | | | | | | | | | | | | | | Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
* Merge branch 'origin' into devel-stableRussell King2010-03-082-2/+2
|\ | | | | | | | | | | | | Conflicts: arch/arm/mach-mx2/devices.c arch/arm/mach-mx2/devices.h sound/soc/pxa/pxa-ssp.c
| * Merge branch 'misc2' into develRussell King2010-02-251-1/+1
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| | * ARM: 5928/1: Change type of VMALLOC_END to unsigned long.Fenkart/Bostandzhyan2010-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Makes it consistent with VMALLOC_START Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Andreas Fenkart <andreas.fenkart@streamunlimited.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 5910/1: ARM: Add tmp register for addruart and loadspTony Lindgren2010-02-121-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] MV78xx0: Support for Buffalo WXL (Terastation Duo)Sebastien Requiem2010-02-233-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Modification of Kconfig to add the Option * 1 new file : buffalo-wxl-setup.c This file is inspired from the db-78xx0-setup.c already present. The following is done: - Configure MPP Lines for the plateform (see my patch for MPP) This is taken from the stock kernel provided by buffalotech (the vendor) - GigaBit Ethernet - Sata - Uart are initiallized in a different way than on the dev board as we have one core only. - USB The kernel has been running for some days now on my plateform. Signed-off-by: Sebastien Requiem <sebastien@kolios.dk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* | [ARM] MV78XX0: MPP routines and definitionsSebastien Requiem2010-02-233-1/+444
|/ | | | | | | | | | | | | | | | | | | This patch is composed of two new files : - mpp.c which is mainly inspired by the same file as in mach-kirkwood - mpp.h that is written from the documentation provided by Marvell http://www.marvell.com/products/processors/embedded/discovery_innovation/HW_MV78100_OpenSource.pdf Moreover, due to some implementation problem, I have defined some MPPX_UNUSED that offer developers the possibility to SET MPP to some unused value (such as for Buffalo WXL). Note: This patch doesn't support MV78200 yet (only 78100 MPP lines have been written) Signed-off-by: Sebastien Requiem <sebastien@kolios.dk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] properly report mv78100 stepping A1Lennert Buytenhek2009-11-052-0/+3
| | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion: convert gpio to use gpiolibErik Benada2009-06-081-0/+3
| | | | | | | | Signed-off-by: Erik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] add coherent DMA mask for mv643xx_ethNicolas Pitre2009-05-221-0/+12
| | | | | | | | Since commit eb0519b5a1cf, mv643xx_eth is non functional on ARM because the platform device declaration does not include any coherent DMA mask and coherent memory allocations fail. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: Remove explicit name for platform device resourcesMartin Michlmayr2009-05-211-4/+0
| | | | | | | | | | Remove explicit names from platform device resources since they will automatically be named after the platform device they're associated with. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Acked-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] 5460/1: Orion: reduce namespace pollutionNicolas Pitre2009-04-236-35/+54
| | | | | | | | | | | | | | | | | Symbols like SOFT_RESET are way too generic to be exported at large. To avoid this, let's move the mbus bridge register defines into a separate file and include it where needed. This affects mach-kirkwood, mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all share code in plat-orion which relies on those defines. Some other defines have been moved to narrower scopes, or simply deleted when they had no user. This fixes compilation problem with mpt2sas on the above listed platforms. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'master' of git://git.marvell.com/orion into develRussell King2009-03-198-7/+259
|\ | | | | | | | | | | Conflicts: arch/arm/mach-mx1/devices.c
| * [ARM] mv78xx0: Add Marvell RD-78x00-mASA Reference Design supportLennert Buytenhek2009-03-153-0/+95
| | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Stanislav Samsonov <samsonov@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] mv78xx0: wire i2c supportRiku Voipio2009-03-034-0/+87
| | | | | | | | | | | | | | | | All the pieces were ready, just matter of assembling them together. Signed-off-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] mv78xx0: enable eth2/eth3 on the mv78xx0 A0 development boardLennert Buytenhek2009-02-191-6/+2
| | | | | | | | | | | | | | | | | | | | | | The A0 revision of the mv78xx0 development board has four ethernet ports, with PHY IDs 8-11, whereas the Z0 version has two, with PHY addresses 8-9. This patch configures the third and fourth ethernet port to use the PHY addresses on the A0 board to enable use of those ports -- if we are running on a Z0 board, the ge10/11 setup code in common.c will force these back to PHYless mode. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] mv78xx0: force eth2/eth3 to PHYless mode on pre-A0 siliconLennert Buytenhek2009-02-191-0/+27
| | | | | | | | | | | | | | | | | | On pre-A0 revisions of the mv78xx0 SoC, the third and fourth ethernet interface are not brought out to pins, but are internally cross-connected, so if we run on pre-A0 silicon, we'll force eth2 and eth3 to PHYless mode. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] mv78xx0: distinguish between different chip steppingsLennert Buytenhek2009-02-194-1/+48
| | | | | | | | | | | | | | | | During boot, identify which chip stepping we're running on (determined by looking at the first PCIe unit's device ID and revision registers), and print a message with the details about what we found. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* | [ARM] pass reboot command line to arch_reset()Russell King2009-03-191-1/+1
|/ | | | | | | | | | | | | | | OMAP wishes to pass state to the boot loader upon reboot in order to instruct it whether to wait for USB-based reflashing or not. There is already a facility to do this via the reboot() syscall, except we ignore the string passed to machine_restart(). This patch fixes things to pass this string to arch_reset(). This means that we keep the reboot mode limited to telling the kernel _how_ to perform the reboot which should be independent of what we request the boot loader to do. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5401/1: Orion: fix edge triggered GPIO interrupt supportNicolas Pitre2009-02-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5361/1: mv78xx0: fix compilation errorNicolas Pitre2009-01-081-0/+1
| | | | | | | Commit ba84be2338d3 broke the build. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mv78xx0: implement GPIO and GPIO interrupt supportLennert Buytenhek2008-12-204-6/+70
| | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Merge git://git.marvell.com/orion into develRussell King2008-12-131-0/+1
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| * [ARM] Orion: add the option to support different ehci phy initializationRonen Shitrit2008-12-041-0/+1
| | | | | | | | | | | | | | | | | | The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
* | [ARM] Hide ISA DMA API when ISA_DMA_API is unsetRussell King2008-11-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | When ISA_DMA_API is unset, we're not implementing the ISA DMA API, so there's no point in publishing the prototypes via asm/dma.h, nor including the machine dependent parts of that API. This allows us to remove a lot of mach/dma.h files which don't contain any useful code. Unfortunately though, some platforms put their own private non-ISA definitions into mach/dma.h, so we leave these behind and fix the appropriate #include statments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] remove a common set of __virt_to_bus definitionsNicolas Pitre2008-11-281-4/+0
|/ | | | | | | | | | | | | | | | Let's provide an overridable default instead of having every machine class define __virt_to_bus and __bus_to_virt to the same thing. What most platforms are using is bus_addr == phys_addr so such is the default. One exception is ebsa110 which has no DMA what so ever, so the actual definition is not important except only for proper compilation. Also added a comment about the special footbridge bus translation. Let's also remove comments alluding to set_dma_addr which is not (and should not) be commonly used. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mv78xx0: force link speed/duplex on eth2/eth3Lennert Buytenhek2008-10-191-0/+5
| | | | | | | | | | | On the mv78xx0 development board, eth2 and eth3 do not have corresponding PHYs, but are internally connected, as a way of facilitating communication between the two CPU cores. Since there are no PHYs, we need to tell the network driver explicitly to force the link on eth2 and eth3 up, to 1000 Mb/s full duplex. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2008-10-116-8/+29
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits) [ARM] 5300/1: fixup spitz reset during boot [ARM] 5295/1: make ZONE_DMA optional [ARM] 5239/1: Palm Zire 72 power management support [ARM] 5298/1: Drop desc_handle_irq() [ARM] 5297/1: [KS8695] Fix two compile-time warnings [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores. [ARM] pxa: allow multi-machine PCMCIA builds [ARM] pxa: add preliminary CPUFREQ support for PXA3xx [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c [ARM] pxa/zylonite: add support for USB OHCI [ARM] ohci-pxa27x: use ioremap() and offset for register access [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph() [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c [ARM] pxa: simplify DMA register definitions [ARM] pxa: make additional DCSR bits valid for PXA3xx [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c ... Fixed up conflicts in arch/arm/mach-versatile/core.c sound/soc/pxa/pxa2xx-ac97.c sound/soc/pxa/pxa2xx-i2s.c manually.
| * Merge branch 'for-rmk' of git://git.marvell.com/orionRussell King2008-10-095-7/+28
| |\ | | | | | | | | | Merge branch 'orion-devel' into devel
| | * [ARM] mv78xx0: wire up ethernet error interruptLennert Buytenhek2008-09-255-7/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Convert asm/io.h to linux/io.hRussell King2008-09-061-1/+1
| |/ | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | mv643xx_eth: remove force_phy_addr fieldLennert Buytenhek2008-09-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, there are two different fields in the mv643xx_eth_platform_data struct that together describe the PHY address -- one field (phy_addr) has the address of the PHY, but if that address is zero, a second field (force_phy_addr) needs to be set to distinguish the actual address zero from a zero due to not having filled in the PHY address explicitly (which should mean 'use the default PHY address'). If we are a bit smarter about the encoding of the phy_addr field, we can avoid the need for a second field -- this patch does that. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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