| Commit message (Expand) | Author | Age | Files | Lines |
* | sh: Expose physical addressing mode through cpuinfo. | Paul Mundt | 2010-10-26 | 1 | -0/+2 |
* | sh: __cpuinit annotate the CPU init path. | Paul Mundt | 2010-04-21 | 1 | -10/+10 |
* | sh: Tidy CPU probing and fixup section annotations. | Paul Mundt | 2010-04-21 | 1 | -2/+2 |
* | sh: Setup boot CPU VBR early to enable early page faults. | Paul Mundt | 2010-02-17 | 1 | -4/+17 |
* | sh: Mass ctrl_in/outX to __raw_read/writeX conversion. | Paul Mundt | 2010-01-26 | 1 | -5/+5 |
* | sh: Kill off the special uncached section and fixmap. | Paul Mundt | 2010-01-21 | 1 | -2/+2 |
*-. | Merge branches 'sh/xstate', 'sh/hw-breakpoints' and 'sh/stable-updates' | Paul Mundt | 2010-01-13 | 1 | -43/+55 |
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| | * | sh: Kill off dead UBC headers. | Paul Mundt | 2010-01-05 | 1 | -12/+8 |
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| * | sh: Move over to dynamically allocated FPU context. | Paul Mundt | 2010-01-13 | 1 | -32/+48 |
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* | sh: Make associative cache writes fatal on all SH-4A parts. | Paul Mundt | 2009-12-04 | 1 | -9/+4 |
* | sh: Minor optimisations to FPU handling | Stuart Menefy | 2009-11-24 | 1 | -2/+2 |
* | sh: Kill off legacy UBC wakeup cruft. | Paul Mundt | 2009-10-16 | 1 | -11/+0 |
* | Merge branch 'master' into sh/cachetlb | Paul Mundt | 2009-08-19 | 1 | -1/+33 |
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| * | sh: delay slot future proofing via EXPMASK on SH-4A parts. | Paul Mundt | 2009-08-15 | 1 | -1/+33 |
* | | sh: rework nommu for generic cache.c use. | Paul Mundt | 2009-08-15 | 1 | -2/+0 |
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* | sh: add weak l2_cache_init function. | Kuninori Morimoto | 2009-06-02 | 1 | -0/+7 |
* | sh: Move arch_get_unmapped_area() in to arch/sh/mm/mmap.c. | Paul Mundt | 2008-12-22 | 1 | -0/+2 |
* | sh: Fix up section mismatches. | Paul Mundt | 2008-03-06 | 1 | -1/+1 |
* | sh: Encode L1/L2 cache shape in auxvt. | Paul Mundt | 2008-01-28 | 1 | -1/+28 |
* | sh: Preparation for uncached jumps through PMB. | Stuart Menefy | 2008-01-28 | 1 | -3/+3 |
* | sh: Disable initial cache flush on SH-5. | Paul Mundt | 2008-01-28 | 1 | -14/+18 |
* | sh: Don't reference UBC code in CPU init on sh64. | Paul Mundt | 2008-01-28 | 1 | -1/+6 |
* | sh: Bring SMP support back from the dead. | Paul Mundt | 2007-09-21 | 1 | -5/+11 |
* | sh: Support explicit L1 cache disabling. | Paul Mundt | 2007-09-21 | 1 | -4/+7 |
* | sh: Tidy up dependencies for SH-2 build. | Paul Mundt | 2007-06-11 | 1 | -14/+1 |
* | sh: speculative execution support for SH7780. | Paul Mundt | 2007-05-07 | 1 | -0/+19 |
* | sh: Fix SH-3 cache entry_mask and way_size calculation. | Paul Mundt | 2007-03-12 | 1 | -3/+17 |
* | sh: Fixup cpu_data references for the non-boot CPUs. | Paul Mundt | 2007-02-13 | 1 | -15/+15 |
* | sh: Use a per-cpu ASID cache. | Paul Mundt | 2007-02-13 | 1 | -2/+9 |
* | sh: Add support for SH7206 and SH7619 CPU subtypes. | Yoshinori Sato | 2006-12-06 | 1 | -0/+2 |
* | sh: Calculate shm alignment at runtime. | Paul Mundt | 2006-09-27 | 1 | -0/+5 |
* | sh: Optimized cache handling for SH-4/SH-4A caches. | Richard Curnow | 2006-09-27 | 1 | -1/+15 |
* | [PATCH] Don't pass boot parameters to argv_init[] | OGAWA Hirofumi | 2006-03-31 | 1 | -1/+1 |
* | Linux-2.6.12-rc2 | Linus Torvalds | 2005-04-16 | 1 | -0/+222 |